@inproceedings{431946be2f0e407690c6d309f59bc35e,
title = "CPM in CMPs: Coordinated power management in chip-multiprocessors",
abstract = "Multiple clock domain architectures have recently been proposed to alleviate the power problem in CMPs by having different frequency/ voltage values assigned to each domain based on workload requirements. However, accurate allocation of power to these voltage/frequency islands based on time varying workload characteristics as well as controlling the power consumption at the provisioned power level is quite non-trivial. Toward this end, we propose a two-tier feedback-based control theoretic solution. Our first-tier consists of a global power manager that allocates power targets to individual islands based on the workload dynamics. The power consumptions of these islands are in turn controlled by a second-tier, consisting of local controllers that regulate island power using dynamic voltage and frequency scaling in response to workload requirements.",
author = "Mishra, {Asit K.} and Shekhar Srikantaiah and Mahmut Kandemir and Das, {Chita R.}",
year = "2010",
doi = "10.1109/SC.2010.15",
language = "English (US)",
isbn = "9781424475575",
series = "2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010",
booktitle = "2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010",
note = "2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010 ; Conference date: 13-11-2010 Through 19-11-2010",
}