Critical gate module process enabling the implementation of a 50A/600V AlGaN/GaN MOS-HEMT

S. G. Khalil, R. Chu, R. Li, D. Wong, S. Newell, X. Chen, M. Chen, D. Zehnder, S. Kim, A. Corrion, B. Hughes, K. Boutros, C. Namuduri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

Two critical processes within the gate module of GaN-based MOS-HEMT with significant impact on device robustness and performance were identified and are presented in this paper. Specifically, data highlighting the impact of the number of cycles of the atomic layer etching of the AlGaN barrier to recess the gate region and the sequence of the gate dielectric anneal step on device performance are discussed. The optimization of these two critical steps enabled the implementation of a 50A/600V with an off-state leakage current of 455 μA at 600V and on-state resistance of 41mΩ at VGS=2.5V.

Original languageEnglish (US)
Title of host publication2012 Proceedings of the European Solid-State Device Research Conference, ESSDERC 2012
Pages310-313
Number of pages4
DOIs
StatePublished - 2012
Event42nd European Solid-State Device Research Conference, ESSDERC 2012 - Bordeaux, France
Duration: Sep 17 2012Sep 21 2012

Publication series

NameEuropean Solid-State Device Research Conference
ISSN (Print)1930-8876

Conference

Conference42nd European Solid-State Device Research Conference, ESSDERC 2012
Country/TerritoryFrance
CityBordeaux
Period9/17/129/21/12

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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