CUSTOM-DESIGNED INTEGRATED CIRCUIT FOR THE REALIZATION OF RESIDUE NUMBER DIGITAL FILTERS.

W. K. Jenkins; E. S. Davidson; D. F. Paul

CUSTOM-DESIGNED INTEGRATED CIRCUIT FOR THE REALIZATION OF RESIDUE NUMBER DIGITAL FILTERS.

W. K. Jenkins, E. S. Davidson, D. F. Paul

Research output: Contribution to journal › Conference article › peer-review

Abstract

Results are presented on the design, layout, and fabrication of a custom-designed integrated circuit for a residue number system digital filter module. The architecture is based on a ROM-accumulator FIR structure in which the modular arithmetic for each module is realized on a separate chip. The modules are designed to support error detection and fault isolation at module boundaries. Of the five chips that were fabricated and tested, all were found to be fully operational, with three operating at a maximum data-cycle frequency of approximately 1. 7 MHz.

Original language	English (US)
Pages (from-to)	220-223
Number of pages	4
Journal	ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
State	Published - Dec 1 1985

All Science Journal Classification (ASJC) codes

Software
Signal Processing
Electrical and Electronic Engineering

Cite this

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title = "CUSTOM-DESIGNED INTEGRATED CIRCUIT FOR THE REALIZATION OF RESIDUE NUMBER DIGITAL FILTERS.",

abstract = "Results are presented on the design, layout, and fabrication of a custom-designed integrated circuit for a residue number system digital filter module. The architecture is based on a ROM-accumulator FIR structure in which the modular arithmetic for each module is realized on a separate chip. The modules are designed to support error detection and fault isolation at module boundaries. Of the five chips that were fabricated and tested, all were found to be fully operational, with three operating at a maximum data-cycle frequency of approximately 1. 7 MHz.",

author = "Jenkins, {W. K.} and Davidson, {E. S.} and Paul, {D. F.}",

year = "1985",

month = dec,

day = "1",

language = "English (US)",

pages = "220--223",

journal = "ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings",

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AU - Davidson, E. S.

AU - Paul, D. F.

PY - 1985/12/1

Y1 - 1985/12/1

N2 - Results are presented on the design, layout, and fabrication of a custom-designed integrated circuit for a residue number system digital filter module. The architecture is based on a ROM-accumulator FIR structure in which the modular arithmetic for each module is realized on a separate chip. The modules are designed to support error detection and fault isolation at module boundaries. Of the five chips that were fabricated and tested, all were found to be fully operational, with three operating at a maximum data-cycle frequency of approximately 1. 7 MHz.

AB - Results are presented on the design, layout, and fabrication of a custom-designed integrated circuit for a residue number system digital filter module. The architecture is based on a ROM-accumulator FIR structure in which the modular arithmetic for each module is realized on a separate chip. The modules are designed to support error detection and fault isolation at module boundaries. Of the five chips that were fabricated and tested, all were found to be fully operational, with three operating at a maximum data-cycle frequency of approximately 1. 7 MHz.

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M3 - Conference article

AN - SCOPUS:0022239578

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JO - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

JF - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

ER -

CUSTOM-DESIGNED INTEGRATED CIRCUIT FOR THE REALIZATION OF RESIDUE NUMBER DIGITAL FILTERS.

Abstract

All Science Journal Classification (ASJC) codes

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