This paper presents the working design of a PC-based stack machine simulator developed for use in an undergraduate computer science and engineering course in compiler design it begins by putting forward the architecture of the virtual stack machine for which the simulator is designed and constructed. The stack machine's instruction set is explained and then followed by a discussion of its encoding scheme. The main data structures and the different stages of the simulator are elaborated upon, culminating in a description of the salient features of the simulator that make it an effective tool in a compiler construction course. This includes the simulator's different analytical features such as measuring space-time complexity to analyze the effectiveness of a compiled code.
|Original language||English (US)|
|Number of pages||5|
|Journal||Proceedings - Frontiers in Education Conference|
|State||Published - 1997|
All Science Journal Classification (ASJC) codes
- Industrial and Manufacturing Engineering