Abstract
This article presents a new design methodology for a D-band bidirectional amplifier that leverages the inherent symmetry of CMOS transistors in a common-gate amplifier. The proposed design exploits symmetric passive networks that achieve interstage conjugate matching conditions in forward and reverse amplifications while minimizing the switching loss in support of bidirectional amplification. A current-reuse technique is proposed to reduce power consumption by sharing the supply current between the adjacent amplifier stages. Two prototype D-band bidirectional amplifiers have been implemented using a 45-nm RFSOI process: transformer and transmission line-based amplifiers. The 103–123-GHz transformer-based amplifier reports measured peak gains of 9 and 7.5 dB in forward and reverse amplifications with a 3-dB bandwidth of 20 GHz, an average noise figure (NF) of 6.3 dB, and a DC power consumption of 25.5 mW. The 124–145-GHz transmission line-based amplifier reports a measured peak gain of 14 dB, a 3-dB bandwidth of 21 GHz, and an average NF of 7 dB with a DC power consumption of 28.5 mW.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 2500-2510 |
| Number of pages | 11 |
| Journal | IEEE Journal of Solid-State Circuits |
| Volume | 60 |
| Issue number | 7 |
| DOIs | |
| State | Published - 2025 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
Fingerprint
Dive into the research topics of 'Design and Implementation of a D-Band Bidirectional Common-Gate Amplifier in 45-nm RFSOI'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver