Design and Implementation of a Real-time Parallel FFT for a Direction-Finding System on an FPGA

Bheema Lakshmi Pradeep, Rishu Anand, Pavan Vadakattu, Syed Azemuddin, Aquibuddin Ahmed

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An FFT is an essential algorithm for radar signal processing in a radar system. Due to increase in computational power of FPGAs, it is possible to perform FFT operation onboard in an airborne vehicle. However, the FPGA resources have become a limitation for processing real-time signals using conventional methods. To address this issue, we have proposed a parallel pipelined FFT architecture that can achieve very high throughput with very low latency, making it capable of processing real-time continuous data. This architecture is implemented in a radar system, which works from L band to Ku band. In this radar system, the received RF signal is downconverted into an IF signal of 1 GHz frequency with a 500 MHz bandwidth and converted to digital data using a 10-bit ADC. On the converted digital data, a 512-point FFT is implemented on a Xilinx Virtex-7 XC7VX485T FPGA using 8 parallel channels with 64 data frames and is compared with the conventional IP core-based architecture. The proposed architecture takes 1.307μs to implement FFT, which is 5.15 times faster than the IP core-based architecture and requires fewer arithmetic computations. The overall total number of complex multiplications, complex additions, multipliers & adders were reduced by 10.42%, 30.64%, 10.42% & 23.90% respectively. Apart from very low latency and fewer arithmetic operations, the proposed parallel FFT architecture achieved a throughput of 1.350 Giga Samples per second (Gsps).

Original languageEnglish (US)
Title of host publication2022 IEEE High Performance Extreme Computing Conference, HPEC 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665497862
DOIs
StatePublished - 2022
Event2022 IEEE High Performance Extreme Computing Conference, HPEC 2022 - Virtual, Online, United States
Duration: Sep 19 2022Sep 23 2022

Publication series

Name2022 IEEE High Performance Extreme Computing Conference, HPEC 2022

Conference

Conference2022 IEEE High Performance Extreme Computing Conference, HPEC 2022
Country/TerritoryUnited States
CityVirtual, Online
Period9/19/229/23/22

All Science Journal Classification (ASJC) codes

  • Artificial Intelligence
  • Computer Science Applications
  • Hardware and Architecture
  • Software
  • Computational Mathematics
  • Numerical Analysis

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