TY - GEN
T1 - Design and implementation of flash ADC and DBNS FIR filter
AU - Nguyen, Minh Son
AU - Kim, Jongsoo
AU - Kim, Insoo
AU - Choi, Kuysun
PY - 2009
Y1 - 2009
N2 - Digital signal processing (DSP) system has been widely used in telecommunication, audio, video, avionics, bio-medical instruments, and portable electronic products. However, DSP needs fast multipliers and adders to process signals at real time. The Double Base Number System (DBNS) can process arithmetic operation fast due to the multidimensional logarithmic number feature, which is suitable for multiplier accumulator architecture of DSP. This system can reduce the hardware complexity by inner product operation. This paper uses the DBNS to improve the DSP arithmetic operation speed with the flash ADC. A 6-bit flash ADC is designed with the 0.18 μm CMOS technology. The HSPICE simulation of proposed coding technique shows 11% and 100% improvement in speed compared with FAT tree encoder and ROM based encoder respectively. In addition, the circuit saved up to 8.16% and 174.85% in power consumption.
AB - Digital signal processing (DSP) system has been widely used in telecommunication, audio, video, avionics, bio-medical instruments, and portable electronic products. However, DSP needs fast multipliers and adders to process signals at real time. The Double Base Number System (DBNS) can process arithmetic operation fast due to the multidimensional logarithmic number feature, which is suitable for multiplier accumulator architecture of DSP. This system can reduce the hardware complexity by inner product operation. This paper uses the DBNS to improve the DSP arithmetic operation speed with the flash ADC. A 6-bit flash ADC is designed with the 0.18 μm CMOS technology. The HSPICE simulation of proposed coding technique shows 11% and 100% improvement in speed compared with FAT tree encoder and ROM based encoder respectively. In addition, the circuit saved up to 8.16% and 174.85% in power consumption.
UR - http://www.scopus.com/inward/record.url?scp=77951463836&partnerID=8YFLogxK
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U2 - 10.1109/SOCDC.2009.5423784
DO - 10.1109/SOCDC.2009.5423784
M3 - Conference contribution
AN - SCOPUS:77951463836
SN - 9781424450343
T3 - 2009 International SoC Design Conference, ISOCC 2009
SP - 325
EP - 328
BT - 2009 International SoC Design Conference, ISOCC 2009
T2 - 2009 International SoC Design Conference, ISOCC 2009
Y2 - 22 November 2009 through 24 November 2009
ER -