Design considerations for databus charge recovery

Benjamin Bishop; Victor Lyuboslavsky; N. Vijaykrishnan; Mary Jane Irwin

doi:10.1109/92.920824

Design considerations for databus charge recovery

Benjamin Bishop, Victor Lyuboslavsky, N. Vijaykrishnan, Mary Jane Irwin

Research output: Contribution to journal › Article › peer-review

4 Scopus citations

Abstract

The charge recovery databus is a scheme which reduce energy consumption through the application of adiabatic circuit techniques. Previous work [2] gives a solid theoretical analysis of this scheme, including quantitative data assuming random bus values. We extend this earlier work by presenting a quantitative analysis of the charge recovery databus using 15 benchmarks and four high-level bus coding schemes. We show that a very simple implementation of the charge recovery databus is capable of reducing average energy consumption by 28% beyond traditional high-level bus encoding techniques. In addition, we examine delay and energy consumption in the added hardware.

Original language	English (US)
Pages (from-to)	104-106
Number of pages	3
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	9
Issue number	1
DOIs	https://doi.org/10.1109/92.920824
State	Published - Feb 2001

All Science Journal Classification (ASJC) codes

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/92.920824

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Design considerations for databus charge recovery

Abstract

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