Design Considerations for DC-DC Voltage Regulators in Distributed Vertical Power Delivery Systems

Modern high performance integrated systems demand high-power (>1 kW) to be delivered at high current density (>2 A/mm²) from PCB to points-of-load (POLs) on-chip. Efficient delivery of high-quality power from PCB to POLs is a primary concern in modern high-power high-density integrated systems. With traditional power delivery approaches, high voltage is converted to high current on PCB, yielding prohibitively high power loss in horizontal packaging interconnect components. One approach to reduce this loss is with vertical power delivery (VPD), i.e., to deliver low current at high voltage horizontally and convert it to high current low voltage close to POLs. Voltage regulators (VRs) integrated within small footprint near POLs, however, exhibit high switching and inductor losses. As a result, state-of-the-art VPD systems still exhibit high IR voltage drops, power efficiency of less than 70%, and high thermal dissipation. Thus, the design of compact power efficient VRs is a primary concern with VPD approach. To enhance the overall performance of the PCB-to-POL power delivery system, distributed VPD is considered and architecture-specific design of VRs is investigated in this paper. The design methodology for determining optimal number and placement of VRs for a given power delivery architecture is also proposed.