TY - GEN
T1 - Design, fabrication and characterization of low-cost glass interposers with fine-pitch through-package-vias
AU - Sukumaran, Vijay
AU - Bandyopadhyay, Tapobrata
AU - Chen, Qiao
AU - Kumbhat, Nitesh
AU - Liu, Fuhan
AU - Pucha, Raghu
AU - Sato, Yoichiro
AU - Watanabe, Mitsuru
AU - Kitaoka, Kenji
AU - Ono, Motoshi
AU - Suzuki, Yuya
AU - Karoui, Choukri
AU - Nopper, Christian
AU - Swaminathan, Madhavan
AU - Sundaram, Venky
AU - Tummala, Rao
PY - 2011
Y1 - 2011
N2 - This paper demonstrates thin glass interposers with fine pitch through package vias (TPV) as a low cost and high I/O substrate for 3D integration. Interposers for packaging of ULK and 3D-ICs need to support large numbers of die to die interconnections with I/O pitch below 50 μm. Current organic substrates are limited by CTE mismatch, wiring density, and poor dimensional stability. Wafer based silicon interposers can achieve high I/Os at fine pitch, but are limited by high cost. Glass is an ideal interposer material due to its insulating property, large panel availability and CTE match to silicon. The main focus of this work is on a) electrical and mechanical design, b) TPV and fine line formation and c) integration process and electrical characterization of thin glass interposers. This work for the first time demonstrates high throughput formation of 30 μm pitch TPVs in ultrathin glass using a parallel laser process. An integration process was demonstrated for glass interposer with polymer build-up layers on both sides. The glass interposer had stable electrical properties up to 20GHz and low insertion loss of less than 0.15dB was measured for TPVs at 9GHz.
AB - This paper demonstrates thin glass interposers with fine pitch through package vias (TPV) as a low cost and high I/O substrate for 3D integration. Interposers for packaging of ULK and 3D-ICs need to support large numbers of die to die interconnections with I/O pitch below 50 μm. Current organic substrates are limited by CTE mismatch, wiring density, and poor dimensional stability. Wafer based silicon interposers can achieve high I/Os at fine pitch, but are limited by high cost. Glass is an ideal interposer material due to its insulating property, large panel availability and CTE match to silicon. The main focus of this work is on a) electrical and mechanical design, b) TPV and fine line formation and c) integration process and electrical characterization of thin glass interposers. This work for the first time demonstrates high throughput formation of 30 μm pitch TPVs in ultrathin glass using a parallel laser process. An integration process was demonstrated for glass interposer with polymer build-up layers on both sides. The glass interposer had stable electrical properties up to 20GHz and low insertion loss of less than 0.15dB was measured for TPVs at 9GHz.
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U2 - 10.1109/ECTC.2011.5898571
DO - 10.1109/ECTC.2011.5898571
M3 - Conference contribution
AN - SCOPUS:79960426887
SN - 9781612844978
T3 - Proceedings - Electronic Components and Technology Conference
SP - 583
EP - 588
BT - 2011 IEEE 61st Electronic Components and Technology Conference, ECTC 2011
T2 - 2011 61st Electronic Components and Technology Conference, ECTC 2011
Y2 - 31 May 2011 through 3 June 2011
ER -