Abstract
The design methods and the automation of the comparator circuit layout generation for a flash A/D converter are presented in this paper. The threshold inverter quantization (TIQ) based A/D converters require 2n - 1 comparators, each one different from all others. Optimal design method of the TIQ comparator presented in this paper significantly improves the linearity of the A/D converter against the CMOS process variation. Especially the DNL dependence on the CMOS process variation can be almost eliminated. The design method has been incorporated into a software package and the 2n - 1 optimized TIQ comparator layouts are generated as an output of the software package. The simulation results are presented to show the effectiveness of the design methods. Also, the prototype chip has been fabricated, with initial test results confirming the DNL reduction.
| Original language | English (US) |
|---|---|
| Article number | 996716 |
| Pages (from-to) | 138-142 |
| Number of pages | 5 |
| Journal | Proceedings - International Symposium on Quality Electronic Design, ISQED |
| Volume | 2002-January |
| DOIs | |
| State | Published - 2002 |
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering
- Safety, Risk, Reliability and Quality
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