Design, modeling, and characterization of embedded capacitor networks for core decoupling in the package

Prathap Muthana; Arif Ege Engin; Madhavan Swaminathan; Rao Tummala; Venkatesh Sundaram; Boyd Wiedenman; Daniel Amey; Karl H. Dietz; Sounak Banerji

doi:10.1109/TADVP.2007.901548

Design, modeling, and characterization of embedded capacitor networks for core decoupling in the package

Prathap Muthana, Arif Ege Engin, Madhavan Swaminathan, Rao Tummala, Venkatesh Sundaram, Boyd Wiedenman, Daniel Amey, Karl H. Dietz, Sounak Banerji

Electrical Engineering

Research output: Contribution to journal › Article › peer-review

29 Scopus citations

Abstract

Embedded passives are gaining in importance due to the reduction in size of electronic products. Capacitors pose the biggest challenge for integration in packages due to the large capacitance required for decoupling high performance circuits. Surface mount discrete (SMD) capacitors become ineffective charge providers above 100 MHz due to the increased effect of loop inductance. This paper focuses on the importance of embedded capacitors above this frequency. Modeling, measurements, and model to hardware correlation of these capacitors are shown. Design and modeling of embedded capacitor arrays for decoupling processors in the midfrequency band (100 MHz-2 GHz) is also highlighted in this paper.

Original language	English (US)
Pages (from-to)	809-822
Number of pages	14
Journal	IEEE Transactions on Advanced Packaging
Volume	30
Issue number	4
DOIs	https://doi.org/10.1109/TADVP.2007.901548
State	Published - Nov 2007

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1109/TADVP.2007.901548

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title = "Design, modeling, and characterization of embedded capacitor networks for core decoupling in the package",

abstract = "Embedded passives are gaining in importance due to the reduction in size of electronic products. Capacitors pose the biggest challenge for integration in packages due to the large capacitance required for decoupling high performance circuits. Surface mount discrete (SMD) capacitors become ineffective charge providers above 100 MHz due to the increased effect of loop inductance. This paper focuses on the importance of embedded capacitors above this frequency. Modeling, measurements, and model to hardware correlation of these capacitors are shown. Design and modeling of embedded capacitor arrays for decoupling processors in the midfrequency band (100 MHz-2 GHz) is also highlighted in this paper.",

author = "Prathap Muthana and Engin, {Arif Ege} and Madhavan Swaminathan and Rao Tummala and Venkatesh Sundaram and Boyd Wiedenman and Daniel Amey and Dietz, {Karl H.} and Sounak Banerji",

note = "Funding Information: Manuscript received April 21, 2006; revised February 18, 2007. This work was supported by The DuPont Company. P. Muthana, A. E. Engin, M. Swaminathan, R. Tummala, V. Sundaram, and B. Wiedenman are with the Georgia Institute of Technology, Atlanta, GA 30309 USA. D. Amey, K. H. Dietz, and S. Banerji are with the Dupont Electronic Technologies, Semiconductor Packaging and Circuit Materials, Research Triangle Park, NC 27709 USA. Digital Object Identifier 10.1109/TADVP.2007.901548",

year = "2007",

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doi = "10.1109/TADVP.2007.901548",

language = "English (US)",

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AU - Muthana, Prathap

AU - Engin, Arif Ege

AU - Swaminathan, Madhavan

AU - Tummala, Rao

AU - Sundaram, Venkatesh

AU - Wiedenman, Boyd

AU - Amey, Daniel

AU - Dietz, Karl H.

AU - Banerji, Sounak

N1 - Funding Information: Manuscript received April 21, 2006; revised February 18, 2007. This work was supported by The DuPont Company. P. Muthana, A. E. Engin, M. Swaminathan, R. Tummala, V. Sundaram, and B. Wiedenman are with the Georgia Institute of Technology, Atlanta, GA 30309 USA. D. Amey, K. H. Dietz, and S. Banerji are with the Dupont Electronic Technologies, Semiconductor Packaging and Circuit Materials, Research Triangle Park, NC 27709 USA. Digital Object Identifier 10.1109/TADVP.2007.901548

PY - 2007/11

Y1 - 2007/11

N2 - Embedded passives are gaining in importance due to the reduction in size of electronic products. Capacitors pose the biggest challenge for integration in packages due to the large capacitance required for decoupling high performance circuits. Surface mount discrete (SMD) capacitors become ineffective charge providers above 100 MHz due to the increased effect of loop inductance. This paper focuses on the importance of embedded capacitors above this frequency. Modeling, measurements, and model to hardware correlation of these capacitors are shown. Design and modeling of embedded capacitor arrays for decoupling processors in the midfrequency band (100 MHz-2 GHz) is also highlighted in this paper.

AB - Embedded passives are gaining in importance due to the reduction in size of electronic products. Capacitors pose the biggest challenge for integration in packages due to the large capacitance required for decoupling high performance circuits. Surface mount discrete (SMD) capacitors become ineffective charge providers above 100 MHz due to the increased effect of loop inductance. This paper focuses on the importance of embedded capacitors above this frequency. Modeling, measurements, and model to hardware correlation of these capacitors are shown. Design and modeling of embedded capacitor arrays for decoupling processors in the midfrequency band (100 MHz-2 GHz) is also highlighted in this paper.

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Design, modeling, and characterization of embedded capacitor networks for core decoupling in the package

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