Design optimization of GNR tunneling-FETs for low voltage operation using EHT-based NEGF simulation

Ximeng Guan; Shengxi Huang; Jiahao Kang; Jinyu Zhang; Zhiping Yu

doi:10.1109/IWCE.2010.5677982

Design optimization of GNR tunneling-FETs for low voltage operation using EHT-based NEGF simulation

Ximeng Guan, Shengxi Huang, Jiahao Kang, Jinyu Zhang, Zhiping Yu

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

GNR (Graphene NanoRibbon) Tunneling-FETs (GNR-TFETs) are simulated using a Non-Equilibrium Green's Function (NEGF) approach using Extended Hückel Theory (EHT)-based Hamiltonian. By comparing performance of ribbons with different bandgaps, it is shown that reducing source/drain doping and operating voltage enables low voltage operation of GNR-TFETs with a bandgap of down to 0.5eV, while still keeping small subthreshold swing (less than 60 mV/dec) and high I_on/I_off ratio. This also lowers the performance sensitivity on GNR width and enables the application of GNR-TFETs in low-power circuits.

Original language	English (US)
Title of host publication	2010 14th International Workshop on Computational Electronics, IWCE 2010
Pages	199-202
Number of pages	4
DOIs	https://doi.org/10.1109/IWCE.2010.5677982
State	Published - Dec 1 2010
Event	2010 14th International Workshop on Computational Electronics, IWCE 2010 - Pisa, Italy Duration: Oct 26 2010 → Oct 29 2010

Publication series

Name	2010 14th International Workshop on Computational Electronics, IWCE 2010

Other

Other	2010 14th International Workshop on Computational Electronics, IWCE 2010
Country/Territory	Italy
City	Pisa
Period	10/26/10 → 10/29/10

All Science Journal Classification (ASJC) codes

Computational Theory and Mathematics
Electrical and Electronic Engineering

Access to Document

10.1109/IWCE.2010.5677982

Cite this

Guan, X., Huang, S., Kang, J., Zhang, J., & Yu, Z. (2010). Design optimization of GNR tunneling-FETs for low voltage operation using EHT-based NEGF simulation. In 2010 14th International Workshop on Computational Electronics, IWCE 2010 (pp. 199-202). Article 5677982 (2010 14th International Workshop on Computational Electronics, IWCE 2010). https://doi.org/10.1109/IWCE.2010.5677982

@inproceedings{260d1c21fe2b4b799460a3ec4ad5a271,

title = "Design optimization of GNR tunneling-FETs for low voltage operation using EHT-based NEGF simulation",

abstract = "GNR (Graphene NanoRibbon) Tunneling-FETs (GNR-TFETs) are simulated using a Non-Equilibrium Green's Function (NEGF) approach using Extended H{\"u}ckel Theory (EHT)-based Hamiltonian. By comparing performance of ribbons with different bandgaps, it is shown that reducing source/drain doping and operating voltage enables low voltage operation of GNR-TFETs with a bandgap of down to 0.5eV, while still keeping small subthreshold swing (less than 60 mV/dec) and high Ion/Ioff ratio. This also lowers the performance sensitivity on GNR width and enables the application of GNR-TFETs in low-power circuits.",

author = "Ximeng Guan and Shengxi Huang and Jiahao Kang and Jinyu Zhang and Zhiping Yu",

year = "2010",

month = dec,

day = "1",

doi = "10.1109/IWCE.2010.5677982",

language = "English (US)",

isbn = "9781424493845",

series = "2010 14th International Workshop on Computational Electronics, IWCE 2010",

pages = "199--202",

booktitle = "2010 14th International Workshop on Computational Electronics, IWCE 2010",

note = "2010 14th International Workshop on Computational Electronics, IWCE 2010 ; Conference date: 26-10-2010 Through 29-10-2010",

}

Guan, X, Huang, S, Kang, J, Zhang, J & Yu, Z 2010, Design optimization of GNR tunneling-FETs for low voltage operation using EHT-based NEGF simulation. in 2010 14th International Workshop on Computational Electronics, IWCE 2010., 5677982, 2010 14th International Workshop on Computational Electronics, IWCE 2010, pp. 199-202, 2010 14th International Workshop on Computational Electronics, IWCE 2010, Pisa, Italy, 10/26/10. https://doi.org/10.1109/IWCE.2010.5677982

Design optimization of GNR tunneling-FETs for low voltage operation using EHT-based NEGF simulation. / Guan, Ximeng; Huang, Shengxi; Kang, Jiahao et al.
2010 14th International Workshop on Computational Electronics, IWCE 2010. 2010. p. 199-202 5677982 (2010 14th International Workshop on Computational Electronics, IWCE 2010).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Design optimization of GNR tunneling-FETs for low voltage operation using EHT-based NEGF simulation

AU - Guan, Ximeng

AU - Huang, Shengxi

AU - Kang, Jiahao

AU - Zhang, Jinyu

AU - Yu, Zhiping

PY - 2010/12/1

Y1 - 2010/12/1

N2 - GNR (Graphene NanoRibbon) Tunneling-FETs (GNR-TFETs) are simulated using a Non-Equilibrium Green's Function (NEGF) approach using Extended Hückel Theory (EHT)-based Hamiltonian. By comparing performance of ribbons with different bandgaps, it is shown that reducing source/drain doping and operating voltage enables low voltage operation of GNR-TFETs with a bandgap of down to 0.5eV, while still keeping small subthreshold swing (less than 60 mV/dec) and high Ion/Ioff ratio. This also lowers the performance sensitivity on GNR width and enables the application of GNR-TFETs in low-power circuits.

AB - GNR (Graphene NanoRibbon) Tunneling-FETs (GNR-TFETs) are simulated using a Non-Equilibrium Green's Function (NEGF) approach using Extended Hückel Theory (EHT)-based Hamiltonian. By comparing performance of ribbons with different bandgaps, it is shown that reducing source/drain doping and operating voltage enables low voltage operation of GNR-TFETs with a bandgap of down to 0.5eV, while still keeping small subthreshold swing (less than 60 mV/dec) and high Ion/Ioff ratio. This also lowers the performance sensitivity on GNR width and enables the application of GNR-TFETs in low-power circuits.

UR - http://www.scopus.com/inward/record.url?scp=78751699656&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=78751699656&partnerID=8YFLogxK

U2 - 10.1109/IWCE.2010.5677982

DO - 10.1109/IWCE.2010.5677982

M3 - Conference contribution

AN - SCOPUS:78751699656

SN - 9781424493845

T3 - 2010 14th International Workshop on Computational Electronics, IWCE 2010

SP - 199

EP - 202

BT - 2010 14th International Workshop on Computational Electronics, IWCE 2010

T2 - 2010 14th International Workshop on Computational Electronics, IWCE 2010

Y2 - 26 October 2010 through 29 October 2010

ER -

Design optimization of GNR tunneling-FETs for low voltage operation using EHT-based NEGF simulation

Abstract

Publication series

Other

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this