TY - JOUR
T1 - Designing a fusion-driven sensor network to selectively track mobile targets
AU - Phoha, Shashi
AU - Mallapragada, Goutham
AU - Wen, Yicheng
AU - Bein, Doina
AU - Ray, Asok
N1 - Funding Information:
∗This material is based upon work supported by, or in part by, the U. S. Army Research Laboratory and the U. S. Army Research Office under the eSensIF MURI Award No. W911NF-07-1-0376. Any opinions, findings, and conclusions or recommendations expressed in this publication are those of the authors and do not necessarily reflect the views of the sponsor. †Corresponding author.
PY - 2012/3
Y1 - 2012/3
N2 - Sensor networks that can support time-critical operations pose challenging problems for tracking events of interest. We propose an architecture for a sensor network that autonomously adapts in real-time to data fusion requirements so as not to miss events of interest and provides accurate real-time mobile target tracking. In the proposed architecture, the sensed data is processed in an abstract space called Information Space and the communication between nodes is modeled as an abstract space called Network Design Space. The two abstract spaces are connected through an interaction interface called InfoNet, that seamlessly translates the messages between the two. The proposed architecture is validated experimentally on a laboratory testbed for multiple scenarios.
AB - Sensor networks that can support time-critical operations pose challenging problems for tracking events of interest. We propose an architecture for a sensor network that autonomously adapts in real-time to data fusion requirements so as not to miss events of interest and provides accurate real-time mobile target tracking. In the proposed architecture, the sensed data is processed in an abstract space called Information Space and the communication between nodes is modeled as an abstract space called Network Design Space. The two abstract spaces are connected through an interaction interface called InfoNet, that seamlessly translates the messages between the two. The proposed architecture is validated experimentally on a laboratory testbed for multiple scenarios.
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U2 - 10.1142/S0129626412500016
DO - 10.1142/S0129626412500016
M3 - Article
AN - SCOPUS:84858134388
SN - 0129-6264
VL - 22
JO - Parallel Processing Letters
JF - Parallel Processing Letters
IS - 1
M1 - 1250001
ER -