TY - GEN
T1 - Die-Embedded Glass Interposer with Minimum Warpage for 5G/6G Applications
AU - Li, Xingchen
AU - Jia, Xiaofan
AU - Kim, Joon Woo
AU - Moon, Kyoung Sik
AU - Jordan, Matthew B.
AU - Swaminathan, Madhavan
N1 - Funding Information:
ACKNOWLEDGMENT This work was funded in part by the Laboratory Directed Research and Development (LDRD) program at Sandia National Laboratories. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy or the United States Government.
Funding Information:
This article has been authored by an employee of National Technology & Engineering Solutions of Sandia, LLC under Contract No. DE-NA0003525 with the U.S. Department of Energy (DOE). The employee owns all right, title and interest in and to the article and is solely responsible for its contents. The United States Government retains and the publisher, by accepting the article for publication, acknowledges that the United States Government retains a non-exclusive, paid-up, irrevocable, world-wide license to publish or reproduce the published form of this article or allow others to do so, for United States Government purposes. The DOE will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan https://www.energy.gov/downloads/doe-public-access-plan.
Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - This paper presents a die-embedded glass interposer with minimum warpage for 5G/6G applications. The interposer performs high integration with low-loss interconnects by embedding multiple chips in the same glass substrate and interconnecting the chips through redistributive layers (RDL). Novel processes for cavity creation, multi-die embedding, carrier- less RDL build up and heat spreader attachment are proposed and demonstrated in this work. Performance of the interposer from 1 GHz to 110 GHz are evaluated. This work provides an advanced packaging solution for low-loss die-to-die and die-to-package interconnects, which is essential to high performance wireless system integration.
AB - This paper presents a die-embedded glass interposer with minimum warpage for 5G/6G applications. The interposer performs high integration with low-loss interconnects by embedding multiple chips in the same glass substrate and interconnecting the chips through redistributive layers (RDL). Novel processes for cavity creation, multi-die embedding, carrier- less RDL build up and heat spreader attachment are proposed and demonstrated in this work. Performance of the interposer from 1 GHz to 110 GHz are evaluated. This work provides an advanced packaging solution for low-loss die-to-die and die-to-package interconnects, which is essential to high performance wireless system integration.
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U2 - 10.1109/ECTC51909.2023.00389
DO - 10.1109/ECTC51909.2023.00389
M3 - Conference contribution
AN - SCOPUS:85168307572
T3 - Proceedings - Electronic Components and Technology Conference
SP - 2247
EP - 2254
BT - Proceedings - IEEE 73rd Electronic Components and Technology Conference, ECTC 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 73rd IEEE Electronic Components and Technology Conference, ECTC 2023
Y2 - 30 May 2023 through 2 June 2023
ER -