TY - GEN
T1 - DR-SNUCA
T2 - 2013 IEEE 31st International Conference on Computer Design, ICCD 2013
AU - Gupta, Anshuman
AU - Sampson, Jack
AU - Taylor, Michael Bedford
PY - 2013
Y1 - 2013
N2 - Multicore processors have become ubiquitous across many domains, such as datacenters and smartphones. As the number of processing elements increases within these processors, so does the pressure to share the critical on-chip cache resources, but this must be done energy-efficiently and without sacrificing resource guarantees. We propose a scalable dynamic cache-partitioning scheme, DR-SNUCA, which provides an energy-efficient way to reduce resource interference over caches shared among many processing elements. Our results show that DR-SNUCA reduces system energy consumption by 16.3% compared to associatively partitioned caches, such as DNUCA.
AB - Multicore processors have become ubiquitous across many domains, such as datacenters and smartphones. As the number of processing elements increases within these processors, so does the pressure to share the critical on-chip cache resources, but this must be done energy-efficiently and without sacrificing resource guarantees. We propose a scalable dynamic cache-partitioning scheme, DR-SNUCA, which provides an energy-efficient way to reduce resource interference over caches shared among many processing elements. Our results show that DR-SNUCA reduces system energy consumption by 16.3% compared to associatively partitioned caches, such as DNUCA.
UR - http://www.scopus.com/inward/record.url?scp=84892520303&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84892520303&partnerID=8YFLogxK
U2 - 10.1109/ICCD.2013.6657096
DO - 10.1109/ICCD.2013.6657096
M3 - Conference contribution
AN - SCOPUS:84892520303
SN - 9781479929870
T3 - 2013 IEEE 31st International Conference on Computer Design, ICCD 2013
SP - 515
EP - 518
BT - 2013 IEEE 31st International Conference on Computer Design, ICCD 2013
PB - IEEE Computer Society
Y2 - 6 October 2013 through 9 October 2013
ER -