Duo-active-neutral-point-clamped multilevel converter: An exploration of the fundamental topology and experimental verification

Vahid Dargahi, Keith A. Corzine, Johan H. Enslin, Mostafa Abarzadeh, Arash Khoshkbar Sadigh, Jose Rodriguez, Frede Blaabjerg

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

For medium-voltage (MV) industrial applications such as the HVDC and adjustable-speed ac-motor drives, the multilevel voltage-source converters are deemed the predominant topologies. One of the promising derived-topologies from the neutral-point-clamped (NPC) configuration is the active NPC (ANPC) structure with an improved balanced lossdistribution performance. This paper introduces duo-ANPC (D-ANPC) converter topology, which is controlled with a new modulation technique. The suggested control method regulates the flying capacitor (FC) voltages naturally at their reference values and preserves the indispensable attribute of the natural balance in the FC-based ANPC inverters. The D-ANPC converter's phase leg is formed by equipping the classic ANPC converter with additional two low-frequency (LF) MV power switches, adding up to six in contrast to four LF power switches in the ANPC. The proposed D-ANPC converter has considerable advantages over the classic multilevel inverters that makes it a competitive topology for MV applications. The substantial reduction in the number of the high-frequency (HF) MV insulated-gate bipolar transistors (IGBTs) by 50% in comparison with the classic ANPC converter as well as a drastic abatement in the total voltage rating and the stored energy of the FCs are the main significant advantages offered by the D-ANPC multilevel converter over the flying-capacitor-based inverters. This study explores the fundamental circuitry of the proposed D-ANPC multilevel topology and provides an exhaustive comparison with classic FC-based inverters. The experimental results are presented to validate the proposed D-ANPC topology and its modulation.

Original languageEnglish (US)
Title of host publicationAPEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages2642-2649
Number of pages8
ISBN (Electronic)9781538611807
DOIs
StatePublished - Apr 18 2018
Event33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018 - San Antonio, United States
Duration: Mar 4 2018Mar 8 2018

Publication series

NameConference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
Volume2018-March

Conference

Conference33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018
Country/TerritoryUnited States
CitySan Antonio
Period3/4/183/8/18

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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