TY - GEN
T1 - Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM
AU - Wang, Yih
AU - Karl, Eric
AU - Meterelliyoz, Mesut
AU - Hamzaoglu, Fatih
AU - Ng, Yong Gee
AU - Ghosh, Swaroop
AU - Wei, Liqiong
AU - Bhattacharya, Uddalak
AU - Zhang, Kevin
PY - 2011/12/1
Y1 - 2011/12/1
N2 - A novel transient voltage collapse (TVC) technique is presented to enable low-voltage operation in SRAM. By dynamically switching off the PMOS during write operations with a collapsed supply voltage below the data retention voltage, a minimum operating voltage (V ccmin) of 0.6V is demonstrated in a 32nm 12-Mb low-power (LP) SRAM. Data retention failure of unselected cells is mitigated by controlling the duration of voltage collapse. Circuit-process co-optimization is critical to ensure robust circuit design margin of TVC technique.
AB - A novel transient voltage collapse (TVC) technique is presented to enable low-voltage operation in SRAM. By dynamically switching off the PMOS during write operations with a collapsed supply voltage below the data retention voltage, a minimum operating voltage (V ccmin) of 0.6V is demonstrated in a 32nm 12-Mb low-power (LP) SRAM. Data retention failure of unselected cells is mitigated by controlling the duration of voltage collapse. Circuit-process co-optimization is critical to ensure robust circuit design margin of TVC technique.
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U2 - 10.1109/IEDM.2011.6131655
DO - 10.1109/IEDM.2011.6131655
M3 - Conference contribution
AN - SCOPUS:84863046376
SN - 9781457705052
T3 - Technical Digest - International Electron Devices Meeting, IEDM
BT - 2011 International Electron Devices Meeting, IEDM 2011
T2 - 2011 IEEE International Electron Devices Meeting, IEDM 2011
Y2 - 5 December 2011 through 7 December 2011
ER -