Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM

  • Yih Wang
  • , Eric Karl
  • , Mesut Meterelliyoz
  • , Fatih Hamzaoglu
  • , Yong Gee Ng
  • , Swaroop Ghosh
  • , Liqiong Wei
  • , Uddalak Bhattacharya
  • , Kevin Zhang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations

Abstract

A novel transient voltage collapse (TVC) technique is presented to enable low-voltage operation in SRAM. By dynamically switching off the PMOS during write operations with a collapsed supply voltage below the data retention voltage, a minimum operating voltage (V ccmin) of 0.6V is demonstrated in a 32nm 12-Mb low-power (LP) SRAM. Data retention failure of unselected cells is mitigated by controlling the duration of voltage collapse. Circuit-process co-optimization is critical to ensure robust circuit design margin of TVC technique.

Original languageEnglish (US)
Title of host publication2011 International Electron Devices Meeting, IEDM 2011
DOIs
StatePublished - Dec 1 2011
Event2011 IEEE International Electron Devices Meeting, IEDM 2011 - Washington, DC, United States
Duration: Dec 5 2011Dec 7 2011

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Other

Other2011 IEEE International Electron Devices Meeting, IEDM 2011
Country/TerritoryUnited States
CityWashington, DC
Period12/5/1112/7/11

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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