Effect of rie sequence and post-rie surface processing on the reliability of gate oxide in a trench

T. Grebs, R. Ridley, K. Chang, C. T. Wu, R. Agarwal, J. Mytych, W. Dimachkié, G. Dolny, G. Michalowicz, Jerzy Ruzyllo

Research output: Contribution to conferencePaperpeer-review

Abstract

In this work the effect of post-RIE silicon-surface treatments on the reliability of gate oxide in a trench is investigated. It is shown that the outcome of the etch sequence used to delineate the trench (i.e. main etch) to a large extend determines what type of surface conditioning etch (i.e. soft etch) should be used prior to gate oxidation. The results obtained demonstrate that the resistance of gate oxide in the trench to electric field stress is degraded as compared to flat MOS gate structures, but can be improved using adequate soft etch techniques. The CF 44/Ar soft etch following the Cl 2-based main etch is shown to be the most effective technique. However, there was no effective soft etch observed following SF 6-based main etch.

Original languageEnglish (US)
Pages108-115
Number of pages8
StatePublished - Dec 1 2003
EventCleaning Technology in Semiconductor Device Manufacturing VIII - Proceedings of the International Symposium - Orlando, FL., United States
Duration: Oct 12 2003Oct 17 2003

Other

OtherCleaning Technology in Semiconductor Device Manufacturing VIII - Proceedings of the International Symposium
Country/TerritoryUnited States
CityOrlando, FL.
Period10/12/0310/17/03

All Science Journal Classification (ASJC) codes

  • General Engineering

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