Abstract
In this work the effect of post-RIE silicon-surface treatments on the reliability of gate oxide in a trench is investigated. It is shown that the outcome of the etch sequence used to delineate the trench (i.e. main etch) to a large extend determines what type of surface conditioning etch (i.e. soft etch) should be used prior to gate oxidation. The results obtained demonstrate that the resistance of gate oxide in the trench to electric field stress is degraded as compared to flat MOS gate structures, but can be improved using adequate soft etch techniques. The CF 44/Ar soft etch following the Cl 2-based main etch is shown to be the most effective technique. However, there was no effective soft etch observed following SF 6-based main etch.
Original language | English (US) |
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Pages | 108-115 |
Number of pages | 8 |
State | Published - Dec 1 2003 |
Event | Cleaning Technology in Semiconductor Device Manufacturing VIII - Proceedings of the International Symposium - Orlando, FL., United States Duration: Oct 12 2003 → Oct 17 2003 |
Other
Other | Cleaning Technology in Semiconductor Device Manufacturing VIII - Proceedings of the International Symposium |
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Country/Territory | United States |
City | Orlando, FL. |
Period | 10/12/03 → 10/17/03 |
All Science Journal Classification (ASJC) codes
- General Engineering