TY - GEN
T1 - Effect of substrate resistivity on switching noise in on-chip power distribution networks
AU - Mao, Jifeng
AU - Swaminathan, Madhavan
AU - Libous, James
AU - O'Connor, Daniel
N1 - Publisher Copyright:
© 2003 IEEE.
PY - 2003
Y1 - 2003
N2 - This paper describes the effect of substrate loss on simultaneous switching noise (SSN) in on-chip power distribution networks (PDN). Conformal mapping and first-order Debye approximation based Finite Difference Time Domain (FDTD) have been used for model extraction and time domain simulation with frequency dependent parameters, respectively. The importance of substrate loss on power supply noise has been quantified in this paper.
AB - This paper describes the effect of substrate loss on simultaneous switching noise (SSN) in on-chip power distribution networks (PDN). Conformal mapping and first-order Debye approximation based Finite Difference Time Domain (FDTD) have been used for model extraction and time domain simulation with frequency dependent parameters, respectively. The importance of substrate loss on power supply noise has been quantified in this paper.
UR - http://www.scopus.com/inward/record.url?scp=10044270359&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=10044270359&partnerID=8YFLogxK
U2 - 10.1109/EPEP.2003.1249994
DO - 10.1109/EPEP.2003.1249994
M3 - Conference contribution
AN - SCOPUS:10044270359
T3 - Electrical Performance of Electronic Packaging
SP - 33
EP - 36
BT - Electrical Performance of Electronic Packaging
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - Electrical Performance of Electronic Packaging, 2003
Y2 - 27 October 2003 through 29 October 2003
ER -