Efficient real-time implementation of MPEG-4 audiovisual decoder using DSP and RISC chips

Byeong Doo Choi; Kang Sun Choi; Sung Jea Ko; Aldo W. Morales

Efficient real-time implementation of MPEG-4 audiovisual decoder using DSP and RISC chips

Byeong Doo Choi, Kang Sun Choi, Sung Jea Ko, Aldo W. Morales

School of Science, Engineering & Technology (Harrisburg)

Research output: Contribution to conference › Paper › peer-review

7 Scopus citations

Abstract

A real-time implementation of MPEG-4 audiovisual decoder using digital signal processing (DSP) and reduced instruction set computing (RISC) chips was presented. MPEG-4 modules were optimized using the seamless double buffering memory structure, the dual MAC applied for half pixel motion compensation (MC), and fast floating-to-integer conversion algorithm. The proposed embedded MPEG-4 implementation is suitable for a mobile multimedia device with power efficiency.

Original language	English (US)
Pages	246-247
Number of pages	2
State	Published - 2003
Event	2003 Digest of Technical Papers: International Conference on Consumer Electronics - Duration: Jun 17 2003 → Jun 19 2003

Other

Other	2003 Digest of Technical Papers: International Conference on Consumer Electronics
Period	6/17/03 → 6/19/03

All Science Journal Classification (ASJC) codes

General Engineering

Cite this

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title = "Efficient real-time implementation of MPEG-4 audiovisual decoder using DSP and RISC chips",

abstract = "A real-time implementation of MPEG-4 audiovisual decoder using digital signal processing (DSP) and reduced instruction set computing (RISC) chips was presented. MPEG-4 modules were optimized using the seamless double buffering memory structure, the dual MAC applied for half pixel motion compensation (MC), and fast floating-to-integer conversion algorithm. The proposed embedded MPEG-4 implementation is suitable for a mobile multimedia device with power efficiency.",

author = "Choi, {Byeong Doo} and Choi, {Kang Sun} and Ko, {Sung Jea} and Morales, {Aldo W.}",

note = "Copyright: Copyright 2008 Elsevier B.V., All rights reserved.; 2003 Digest of Technical Papers: International Conference on Consumer Electronics ; Conference date: 17-06-2003 Through 19-06-2003",

year = "2003",

language = "English (US)",

pages = "246--247",

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AU - Ko, Sung Jea

AU - Morales, Aldo W.

PY - 2003

Y1 - 2003

N2 - A real-time implementation of MPEG-4 audiovisual decoder using digital signal processing (DSP) and reduced instruction set computing (RISC) chips was presented. MPEG-4 modules were optimized using the seamless double buffering memory structure, the dual MAC applied for half pixel motion compensation (MC), and fast floating-to-integer conversion algorithm. The proposed embedded MPEG-4 implementation is suitable for a mobile multimedia device with power efficiency.

AB - A real-time implementation of MPEG-4 audiovisual decoder using digital signal processing (DSP) and reduced instruction set computing (RISC) chips was presented. MPEG-4 modules were optimized using the seamless double buffering memory structure, the dual MAC applied for half pixel motion compensation (MC), and fast floating-to-integer conversion algorithm. The proposed embedded MPEG-4 implementation is suitable for a mobile multimedia device with power efficiency.

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M3 - Paper

AN - SCOPUS:0043135141

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T2 - 2003 Digest of Technical Papers: International Conference on Consumer Electronics

Y2 - 17 June 2003 through 19 June 2003

ER -

Efficient real-time implementation of MPEG-4 audiovisual decoder using DSP and RISC chips

Abstract

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All Science Journal Classification (ASJC) codes

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