Electromagnetic modelling of switching noise in on-chip power distribution networks

Jifeng Mao, Woopoung Kim, Suna Choi, M. Swaminathan, J. Libous, D. O'connor

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

An investigation of the effect of substrate loss on simultaneous switching noise (SSN) in on-chip power distribution networks is presented. In order to characterize the multi-layered power buses accurately for on-chip switching noise simulation, modelling of Vdd/ground rails over finite-resistivity substrates should include dielectric loss. The complete circuit model of power rails are then represented using RLCG elements. The waveform and propagation pattern of the noise are captured using finite difference time domain (FDTD) technique. This paper shows the effect of silicon substrate with different resistivities on the propagation of on-chip switching noise.

Original languageEnglish (US)
Title of host publicationINCEMIC 2003 - 8th International Conference on Electromagnetic Interference and Compatibility, Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages47-52
Number of pages6
ISBN (Electronic)8190065211
DOIs
StatePublished - 2003
Event8th International Conference on Electromagnetic Interference and Compatibility, INCEMIC 2003 - Chennai, India
Duration: Dec 18 2003Dec 19 2003

Publication series

NameProceedings of the International Conference on Electromagnetic Interference and Compatibility
Volume2003-January

Conference

Conference8th International Conference on Electromagnetic Interference and Compatibility, INCEMIC 2003
Country/TerritoryIndia
CityChennai
Period12/18/0312/19/03

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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