Electron and hole trapping in the bulk and interface with Si of a thermal oxide grown on the sidewalls and base of a U-shaped silicon trench

S. A. Suliman, O. O. Awadelkarim, S. J. Fonash, R. S. Ridley, G. M. Dolny, J. Hao, C. M. Knoedler

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7 Scopus citations

Abstract

We report on the results of deep level transient spectroscopy (DLTS) and capacitance-voltage studies made on U-shaped trench-gated n+-polycrystalline Si-oxide-Si capacitors. The two processing steps examined are the reactive ion etching of the trench and the thermal oxide growth between 900 and 1175 °C. The mid-gap SiO2/Si interface state density (∼1011 eV-1 cm-2) and the total oxide charge (∼10 nC cm-2) are observed to increase with increasing oxide growth temperature. The electron trapping and hole trapping at the interface are observed by DLTS and are argued to occur within dangling bonds. Variations in dangling bond orientation with respect to the plane of the interface coupled with the variation in the local stress state at the dangling bond site, are suggested to cause energy level splitting and/or broadening, thereby, giving rise to interfacial dangling bond energy bands. These bands are observed by DLTS as symmetrical and broad signals (∼100 meV wide) at ∼0.20-0.29 eV below the bottom of the conduction band for the electron traps, and at ∼0.29 eV above the valence band edge for the hole traps. As carriers are trapped within states in these bands the corresponding dangling bond defects change their charge states from neutral to singly negative in the electron traps or to singly positive in the hole traps. This is inferred from the capture cross-sections obtained for electrons and holes at the traps which are found to be of the order of 10-15 cm2.

Original languageEnglish (US)
Pages (from-to)837-845
Number of pages9
JournalSolid-State Electronics
Volume46
Issue number6
DOIs
StatePublished - Jun 2002

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Materials Chemistry
  • Electrical and Electronic Engineering

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