Abstract
In this paper, we present a new addition algorithm-ELM. This algorithm makes use of a tree of simple processors and requires O(log n) time, where n is the number of bits in the augend and addend. The sum itself is computed in one pass through the tree. This algorithm was discovered by a VLSI CAD tool, FACTOR, developed at Penn State for use in synthesizing CMOS VLSI circuits.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 1181-1184 |
| Number of pages | 4 |
| Journal | IEEE Transactions on Computers |
| Volume | 41 |
| Issue number | 9 |
| DOIs | |
| State | Published - Sep 1992 |
All Science Journal Classification (ASJC) codes
- Software
- Theoretical Computer Science
- Hardware and Architecture
- Computational Theory and Mathematics
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