Embedded decoupling capacitor performance in high speed circuits

Lixi Wan, P. Markondeya Raj, Devarajan Balaraman, Prathap Muthana, Swapan K. Bhattacharya, Mahesh Varadarajan, Isaac Robin Abothu, Madhavan Swaminathan, Rao Tummala

Research output: Contribution to journalConference articlepeer-review

16 Scopus citations


Embedded decoupling is normally considered a better solution than surface mount decoupling for suppressing the switching noise of a high speed digital board/package because of its shorter leads that result in smaller parasitic inductance. This leads to lower impedance over a higher frequency band. It is presumably better in reliability and lowers the cost as well. Designers tend to use large value capacitors for efficient decoupling. Usually, to increase capacitance of an embedded capacitor, one can use a material with higher dielectric constant, design larger electrodes, and reduce the thickness of the dielectric. However, these strategies may sometimes lead to lower performance at high frequency band. This paper will discuss the pros and cons of different embedded capacitor approaches through simulation. As an application example, a typical power/ground network with an embedded capacitor will be compared with that of surface mount discrete capacitor.

Original languageEnglish (US)
Pages (from-to)1617-1622
Number of pages6
JournalProceedings - Electronic Components and Technology Conference
StatePublished - 2005
Event55th Electronic Components and Technology Conference, ECTC - Lake Buena Vista, FL, United States
Duration: May 31 2005Jun 4 2005

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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