Abstract
We illustrate a new method to characterize the energy dissipation of circuits by collapsing closely related input transition vectors and energy patterns into capacitive coefficients. Energy characterization needs to be done only once for each module (ALU, multiplier etc.,) in order to build a library of these capacitive coefficients. A direct high-level energy simulator or profiler can then use the library of pre-characterized modules and a sequence of input vectors to compute the total energy dissipation. A heuristic algorithm which performs energy clustering under objective constraints has been devised. The worst case running time of this algorithm is O(m3n), where m is the number of simulation points and n is the number of inputs of the circuit. The designer can experiment with the criterion function by setting the appropriate relative error norms to control the `goodness' of the clustering algorithm and the sampling error and confidence level to maintain the sufficiency of representation of each cluster. Experiments on circuits show a significant reduction of the energy table size under a specified criterion function, cluster sampling error and confidence levels.
Original language | English (US) |
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Pages (from-to) | 702-707 |
Number of pages | 6 |
Journal | Proceedings - Design Automation Conference |
DOIs | |
State | Published - 1996 |
Event | Proceedings of the 1996 33rd Annual Design Automation Conference - Las Vegas, NV, USA Duration: Jun 3 1996 → Jun 7 1996 |
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Control and Systems Engineering