TY - GEN
T1 - Energy-efficient instruction cache using page-based placement
AU - Kim, S.
AU - Vijaykrishnan, N.
AU - Kandemir, M.
AU - Irwin, M. J.
N1 - Funding Information:
This work was supported in part by NSF grants 0073419, 0082064, 0093082, 0093085, and GSRC.
Publisher Copyright:
Copyright 2001 ACM.
PY - 2001/11/16
Y1 - 2001/11/16
N2 - Energy consumption is a crucial factor in designing battery- operated embedded and mobile systems. The memory system is a major contributor to the system energy in such environments. In order to optimize energy and energy-delay in the memory system, we investigate ways of splitting the instruction cache into several smaller units, each of which is a cache by itself (called subcache). The subcache architecture employs a page-based placement strategy, a dynamic cache line remapping policy and a predictive precharging policy in order to improve the memory system energy behavior. Using applications from the SPECjvm98 and SPECint2000 benchmarks, the proposed subcache architecture is shown to be effective in improving both the energy and energy-delay metrics.
AB - Energy consumption is a crucial factor in designing battery- operated embedded and mobile systems. The memory system is a major contributor to the system energy in such environments. In order to optimize energy and energy-delay in the memory system, we investigate ways of splitting the instruction cache into several smaller units, each of which is a cache by itself (called subcache). The subcache architecture employs a page-based placement strategy, a dynamic cache line remapping policy and a predictive precharging policy in order to improve the memory system energy behavior. Using applications from the SPECjvm98 and SPECint2000 benchmarks, the proposed subcache architecture is shown to be effective in improving both the energy and energy-delay metrics.
UR - http://www.scopus.com/inward/record.url?scp=85024273712&partnerID=8YFLogxK
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U2 - 10.1145/502217.502256
DO - 10.1145/502217.502256
M3 - Conference contribution
AN - SCOPUS:85024273712
T3 - CASES 2001 - Proceedings of the 2001 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
SP - 229
EP - 237
BT - CASES 2001 - Proceedings of the 2001 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
PB - Association for Computing Machinery, Inc
T2 - 2nd International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2001
Y2 - 16 November 2001 through 17 November 2001
ER -
