Abstract
Performance and energy consumption behavior of embedded applications are increasingly being dependent on their memory usage/access patterns. Focusing on a software-managed, application-specific multi-level memory hierarchy, this paper studies three different memory hierarchy management schemes from both energy and performance angles. The first scheme is pure performance-oriented and tuned for extracting the maximum performance possible from the software-managed multi-level memory hierarchy. The second scheme is built upon the first one but it also reduces leakage by turning-on and off memory modules (i.e., different memory levels) at appropriate program points during execution based on the data access pattern information extracted by the compiler. The last scheme evaluated is oriented towards further reducing leakage energy, as well as dynamic energy, by modifying the data transfer policy (data access pattern) of the performance-oriented scheme. Our empirical analysis indicates that it is possible to reduce leakage consumption of the application-specific multi-level memory hierarchy without seriously impacting its performance, and that one can achieve further savings by modifying data transfer pattern across the different levels of the memory hierarchy.
Original language | English (US) |
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Pages | 270-275 |
Number of pages | 6 |
DOIs | |
State | Published - 2005 |
Event | 2005 ACM Great Lakessymposium on VLSI, GLSVLSI'05 - Chicago, IL, United States Duration: Apr 17 2005 → Apr 19 2005 |
Other
Other | 2005 ACM Great Lakessymposium on VLSI, GLSVLSI'05 |
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Country/Territory | United States |
City | Chicago, IL |
Period | 4/17/05 → 4/19/05 |
All Science Journal Classification (ASJC) codes
- General Engineering