Energy optimization techniques in cluster interconnects

E. J. Kim; K. H. Yum; G. M. Link; N. Vijaykrishnan; M. Kandemir; M. J. Irwin; M. Yousif; C. R. Das

doi:10.1109/LPE.2003.1231952

Energy optimization techniques in cluster interconnects

E. J. Kim
, K. H. Yum
, G. M. Link
, N. Vijaykrishnan
, M. Kandemir
, M. J. Irwin
, M. Yousif
, C. R. Das

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

82 Scopus citations

Abstract

Designing energy-efficient clusters has recently become an important concern to make these systems economically attractive for many applications. Since the links and switch buffers consume the major portion of the power budget of the cluster, the focus of this paper is to optimize the energy consumption in these two components. To minimize power in the links, we propose a novel dynamic link shutdown (DLS) technique. The DLS technique makes use of an appropriate adaptive routing algorithm to shutdown the links intelligently. We also present an optimized buffer design for reducing leakage energy. Our analysis on different networks using a complete system simulator reveals that the proposed DLS technique can provide optimized performance-energy behavior (up to 40% energy savings with less than 5% performance degradation in the best case) for the cluster interconnects.

Original language	English (US)
Title of host publication	ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	459-464
Number of pages	6
ISBN (Electronic)	158113682X
DOIs	https://doi.org/10.1109/LPE.2003.1231952
State	Published - 2003
Event	2003 International Symposium on Low Power Electronics and Design, ISLPED 2003 - Seoul, Korea, Republic of Duration: Aug 25 2003 → Aug 27 2003

Publication series

Name	Proceedings of the International Symposium on Low Power Electronics and Design
Volume	2003-January
ISSN (Print)	1533-4678

Conference

Conference	2003 International Symposium on Low Power Electronics and Design, ISLPED 2003
Country/Territory	Korea, Republic of
City	Seoul
Period	8/25/03 → 8/27/03

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

All Science Journal Classification (ASJC) codes

General Engineering

Access to Document

10.1109/LPE.2003.1231952

Cite this

Kim, E. J., Yum, K. H., Link, G. M., Vijaykrishnan, N., Kandemir, M., Irwin, M. J., Yousif, M., & Das, C. R. (2003). Energy optimization techniques in cluster interconnects. In ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design (pp. 459-464). Article 1231952 (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/LPE.2003.1231952

@inproceedings{124a4a15597d4bf091d21d8bd2418df4,

title = "Energy optimization techniques in cluster interconnects",

abstract = "Designing energy-efficient clusters has recently become an important concern to make these systems economically attractive for many applications. Since the links and switch buffers consume the major portion of the power budget of the cluster, the focus of this paper is to optimize the energy consumption in these two components. To minimize power in the links, we propose a novel dynamic link shutdown (DLS) technique. The DLS technique makes use of an appropriate adaptive routing algorithm to shutdown the links intelligently. We also present an optimized buffer design for reducing leakage energy. Our analysis on different networks using a complete system simulator reveals that the proposed DLS technique can provide optimized performance-energy behavior (up to 40\% energy savings with less than 5\% performance degradation in the best case) for the cluster interconnects.",

author = "Kim, \{E. J.\} and Yum, \{K. H.\} and Link, \{G. M.\} and N. Vijaykrishnan and M. Kandemir and Irwin, \{M. J.\} and M. Yousif and Das, \{C. R.\}",

note = "Publisher Copyright: {\textcopyright} 2003 ACM.; 2003 International Symposium on Low Power Electronics and Design, ISLPED 2003 ; Conference date: 25-08-2003 Through 27-08-2003",

year = "2003",

doi = "10.1109/LPE.2003.1231952",

language = "English (US)",

series = "Proceedings of the International Symposium on Low Power Electronics and Design",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "459--464",

booktitle = "ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design",

address = "United States",

}

Kim, EJ, Yum, KH, Link, GM, Vijaykrishnan, N , Kandemir, M, Irwin, MJ, Yousif, M & Das, CR 2003, Energy optimization techniques in cluster interconnects. in ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design., 1231952, Proceedings of the International Symposium on Low Power Electronics and Design, vol. 2003-January, Institute of Electrical and Electronics Engineers Inc., pp. 459-464, 2003 International Symposium on Low Power Electronics and Design, ISLPED 2003, Seoul, Korea, Republic of, 8/25/03. https://doi.org/10.1109/LPE.2003.1231952

Energy optimization techniques in cluster interconnects. / Kim, E. J.; Yum, K. H.; Link, G. M. et al.
ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 2003. p. 459-464 1231952 (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Energy optimization techniques in cluster interconnects

AU - Kim, E. J.

AU - Yum, K. H.

AU - Link, G. M.

AU - Vijaykrishnan, N.

AU - Kandemir, M.

AU - Irwin, M. J.

AU - Yousif, M.

AU - Das, C. R.

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N2 - Designing energy-efficient clusters has recently become an important concern to make these systems economically attractive for many applications. Since the links and switch buffers consume the major portion of the power budget of the cluster, the focus of this paper is to optimize the energy consumption in these two components. To minimize power in the links, we propose a novel dynamic link shutdown (DLS) technique. The DLS technique makes use of an appropriate adaptive routing algorithm to shutdown the links intelligently. We also present an optimized buffer design for reducing leakage energy. Our analysis on different networks using a complete system simulator reveals that the proposed DLS technique can provide optimized performance-energy behavior (up to 40% energy savings with less than 5% performance degradation in the best case) for the cluster interconnects.

AB - Designing energy-efficient clusters has recently become an important concern to make these systems economically attractive for many applications. Since the links and switch buffers consume the major portion of the power budget of the cluster, the focus of this paper is to optimize the energy consumption in these two components. To minimize power in the links, we propose a novel dynamic link shutdown (DLS) technique. The DLS technique makes use of an appropriate adaptive routing algorithm to shutdown the links intelligently. We also present an optimized buffer design for reducing leakage energy. Our analysis on different networks using a complete system simulator reveals that the proposed DLS technique can provide optimized performance-energy behavior (up to 40% energy savings with less than 5% performance degradation in the best case) for the cluster interconnects.

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M3 - Conference contribution

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T3 - Proceedings of the International Symposium on Low Power Electronics and Design

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EP - 464

BT - ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2003 International Symposium on Low Power Electronics and Design, ISLPED 2003

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ER -

Kim EJ, Yum KH, Link GM, Vijaykrishnan N , Kandemir M, Irwin MJ et al. Energy optimization techniques in cluster interconnects. In ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc. 2003. p. 459-464. 1231952. (Proceedings of the International Symposium on Low Power Electronics and Design). doi: 10.1109/LPE.2003.1231952

Energy optimization techniques in cluster interconnects

Abstract

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UN SDGs

All Science Journal Classification (ASJC) codes

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