Estimating influence of data layout optimizations on SDRAM energy consumption

H. S. Kim; N. Vijaykrishnan; M. Kandemir; E. Brockmeyer; F. Catthoor; M. J. Irwin

doi:10.1109/LPE.2003.1231832

Estimating influence of data layout optimizations on SDRAM energy consumption

H. S. Kim
, N. Vijaykrishnan
, M. Kandemir
, E. Brockmeyer
, F. Catthoor
, M. J. Irwin

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

15 Scopus citations

Abstract

An important problem in extracting maximum benefits from an SDRAM-based architecture is to exploit data locality at the page granularity. Frequent switches between data pages can increase memory latency and have an impact on energy consumption. In this paper, we propose a mathematical formulation, using Presburger arithmetic and Ehrhart polynomials to-estimate the number of page breaks statically (i.e., at compile time). The results obtained using video codes indicate that the proposed framework can estimate the number of page breaks with good accuracy.

Original language	English (US)
Title of host publication	ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	40-43
Number of pages	4
ISBN (Electronic)	158113682X
DOIs	https://doi.org/10.1109/LPE.2003.1231832
State	Published - 2003
Event	2003 International Symposium on Low Power Electronics and Design, ISLPED 2003 - Seoul, Korea, Republic of Duration: Aug 25 2003 → Aug 27 2003

Publication series

Name	Proceedings of the International Symposium on Low Power Electronics and Design
Volume	2003-January
ISSN (Print)	1533-4678

Conference

Conference	2003 International Symposium on Low Power Electronics and Design, ISLPED 2003
Country/Territory	Korea, Republic of
City	Seoul
Period	8/25/03 → 8/27/03

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

All Science Journal Classification (ASJC) codes

General Engineering

Access to Document

10.1109/LPE.2003.1231832

Cite this

Kim, H. S., Vijaykrishnan, N., Kandemir, M., Brockmeyer, E., Catthoor, F., & Irwin, M. J. (2003). Estimating influence of data layout optimizations on SDRAM energy consumption. In ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design (pp. 40-43). Article 1231832 (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/LPE.2003.1231832

Kim, H. S. ; Vijaykrishnan, N. ; Kandemir, M. et al. / Estimating influence of data layout optimizations on SDRAM energy consumption. ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 2003. pp. 40-43 (Proceedings of the International Symposium on Low Power Electronics and Design).

@inproceedings{2ad0cafe559249678834146c363bd9c4,

title = "Estimating influence of data layout optimizations on SDRAM energy consumption",

abstract = "An important problem in extracting maximum benefits from an SDRAM-based architecture is to exploit data locality at the page granularity. Frequent switches between data pages can increase memory latency and have an impact on energy consumption. In this paper, we propose a mathematical formulation, using Presburger arithmetic and Ehrhart polynomials to-estimate the number of page breaks statically (i.e., at compile time). The results obtained using video codes indicate that the proposed framework can estimate the number of page breaks with good accuracy.",

author = "Kim, \{H. S.\} and N. Vijaykrishnan and M. Kandemir and E. Brockmeyer and F. Catthoor and Irwin, \{M. J.\}",

note = "Publisher Copyright: {\textcopyright} 2003 ACM.; 2003 International Symposium on Low Power Electronics and Design, ISLPED 2003 ; Conference date: 25-08-2003 Through 27-08-2003",

year = "2003",

doi = "10.1109/LPE.2003.1231832",

language = "English (US)",

series = "Proceedings of the International Symposium on Low Power Electronics and Design",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "40--43",

booktitle = "ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design",

address = "United States",

}

Kim, HS, Vijaykrishnan, N , Kandemir, M, Brockmeyer, E, Catthoor, F & Irwin, MJ 2003, Estimating influence of data layout optimizations on SDRAM energy consumption. in ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design., 1231832, Proceedings of the International Symposium on Low Power Electronics and Design, vol. 2003-January, Institute of Electrical and Electronics Engineers Inc., pp. 40-43, 2003 International Symposium on Low Power Electronics and Design, ISLPED 2003, Seoul, Korea, Republic of, 8/25/03. https://doi.org/10.1109/LPE.2003.1231832

Estimating influence of data layout optimizations on SDRAM energy consumption. / Kim, H. S.; Vijaykrishnan, N.; Kandemir, M. et al.
ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 2003. p. 40-43 1231832 (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Estimating influence of data layout optimizations on SDRAM energy consumption

AU - Kim, H. S.

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AU - Kandemir, M.

AU - Brockmeyer, E.

AU - Catthoor, F.

AU - Irwin, M. J.

PY - 2003

Y1 - 2003

N2 - An important problem in extracting maximum benefits from an SDRAM-based architecture is to exploit data locality at the page granularity. Frequent switches between data pages can increase memory latency and have an impact on energy consumption. In this paper, we propose a mathematical formulation, using Presburger arithmetic and Ehrhart polynomials to-estimate the number of page breaks statically (i.e., at compile time). The results obtained using video codes indicate that the proposed framework can estimate the number of page breaks with good accuracy.

AB - An important problem in extracting maximum benefits from an SDRAM-based architecture is to exploit data locality at the page granularity. Frequent switches between data pages can increase memory latency and have an impact on energy consumption. In this paper, we propose a mathematical formulation, using Presburger arithmetic and Ehrhart polynomials to-estimate the number of page breaks statically (i.e., at compile time). The results obtained using video codes indicate that the proposed framework can estimate the number of page breaks with good accuracy.

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U2 - 10.1109/LPE.2003.1231832

DO - 10.1109/LPE.2003.1231832

M3 - Conference contribution

AN - SCOPUS:1542359434

T3 - Proceedings of the International Symposium on Low Power Electronics and Design

SP - 40

EP - 43

BT - ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2003 International Symposium on Low Power Electronics and Design, ISLPED 2003

Y2 - 25 August 2003 through 27 August 2003

ER -

Kim HS, Vijaykrishnan N , Kandemir M, Brockmeyer E, Catthoor F, Irwin MJ. Estimating influence of data layout optimizations on SDRAM energy consumption. In ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc. 2003. p. 40-43. 1231832. (Proceedings of the International Symposium on Low Power Electronics and Design). doi: 10.1109/LPE.2003.1231832

Estimating influence of data layout optimizations on SDRAM energy consumption

Abstract

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Conference

UN SDGs

All Science Journal Classification (ASJC) codes

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