Skip to main navigation
Skip to search
Skip to main content
Penn State Home
Help & FAQ
Home
Researchers
Research output
Research units
Equipment
Grants & Projects
Prizes
Activities
Search by expertise, name or affiliation
Evaluation of Tradeoffs in the Design of FPGA Fabrics Using Electrostrictive 2-D FETs
Saambhavi Baskaran,
Jack Sampson
Computer Science and Engineering
Materials Research Institute (MRI)
Research output
:
Contribution to journal
›
Article
›
peer-review
Overview
Fingerprint
Fingerprint
Dive into the research topics of 'Evaluation of Tradeoffs in the Design of FPGA Fabrics Using Electrostrictive 2-D FETs'. Together they form a unique fingerprint.
Sort by
Weight
Alphabetically
Keyphrases
Electrostrictive Material
100%
Field Programmable Gate Arrays
100%
Transistor
75%
Device Capacitance
50%
High Drive
50%
Back Gate
50%
Drive Strength
50%
Energy Cost
25%
Field-effect Transistors
25%
Design Approach
25%
Energy Efficiency
25%
Bias Voltage
25%
Gate Terminal
25%
Co-optimization
25%
Performance Efficiency
25%
Steep Slope Devices
25%
Special Design
25%
Piezoelectric Layer
25%
Transistor Structure
25%
Transduction Efficiency
25%
On-off Ratio
25%
Idiosyncrasy
25%
Subcircuit
25%
Engineering Parameters
25%
Voltage Scalability
25%
Interconnection Architectures
25%
Energy Efficient Architecture
25%
Engineering
Field Effect Transistor
100%
Field Programmable Gate Arrays
100%
Engineering
25%
Field-Effect Transistor
25%
Piezoelectric
25%
Energy Conservation
25%
Bias Voltage
25%
Energy Efficiency
25%
Electric Power Utilization
25%
Interconnects
25%
Subcircuit
25%
Current Ratio
25%