Exploiting inter-processor data sharing for improving behavior of multi-processor SoCs

Software-managed memories are important in real-time embedded environments where execution time predictability is an important requirement. With the proliferation of embedded multi-processor systems, software support for their memories is becoming an attractive research area in real-time embedded computing. One of the critical problems in embedded real-time multi-processor SoCs (System-on-a-Chip) is to reduce the number of off-chip references. This is because frequent off-chip references can be very costly from both performance and power perspectives. In this paper, we propose a novel compiler-driven strategy for reducing the number of off-chip references, which is based on co-operation between the processors in the multi-processor architecture. Specifically, in the proposed strategy, the processors cache data in their local memories, under compiler control, on behalf of each other if doing so reduces the number of off-chip references.