TY - GEN
T1 - Fast, bit-accurate simulation of truncated-matrix multipliers and squarers
AU - Walters, E. George
AU - Schulte, Michael J.
PY - 2010
Y1 - 2010
N2 - Truncated-matrix multipliers and squarers offer significant reductions in area, power, and delay, at the expense of increased computational error. These trade-offs make them an attractive choice for many signal processing systems. However, extensive bit-accurate simulation is often necessary to explore the design space effectively and chose the best parameters when using them in systems. This paper presents an algorithm for fast, bit-accurate simulation of truncated-matrix multipliers and squarers in software. The algorithm is applicable to most correction methods published to date, is simple to implement, and it facilitates research into system-level use of truncated-matrix units.
AB - Truncated-matrix multipliers and squarers offer significant reductions in area, power, and delay, at the expense of increased computational error. These trade-offs make them an attractive choice for many signal processing systems. However, extensive bit-accurate simulation is often necessary to explore the design space effectively and chose the best parameters when using them in systems. This paper presents an algorithm for fast, bit-accurate simulation of truncated-matrix multipliers and squarers in software. The algorithm is applicable to most correction methods published to date, is simple to implement, and it facilitates research into system-level use of truncated-matrix units.
UR - http://www.scopus.com/inward/record.url?scp=79957986930&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=79957986930&partnerID=8YFLogxK
U2 - 10.1109/ACSSC.2010.5757582
DO - 10.1109/ACSSC.2010.5757582
M3 - Conference contribution
AN - SCOPUS:79957986930
SN - 9781424497218
T3 - Conference Record - Asilomar Conference on Signals, Systems and Computers
SP - 1139
EP - 1143
BT - Conference Record of the 44th Asilomar Conference on Signals, Systems and Computers, Asilomar 2010
T2 - 44th Asilomar Conference on Signals, Systems and Computers, Asilomar 2010
Y2 - 7 November 2010 through 10 November 2010
ER -