Abstract
In-memory compute kernels present a promising approach for addressing data-centric workloads. However, their scalability—particularly for computationally intensive tasks solving combinatorial optimization problems such as Boolean satisfiability (SAT), which are inherently difficult to decompose—remains a significant challenge. In this work, we propose a ferroelectric nonvolatile memory (NVM)-based compute-in-memory annealer for solving the Boolean MaxSAT problem. We experimentally demonstrate the computational functionality of the NVM array using a compact 20 × 10 HZO-/IWO-based ferroelectric field-effect-transistor (FeFET) array. More importantly, through experimentally calibrated simulations, we demonstrate that our solution is compatible with a modular memory architecture, allowing the problem sizes to exceed the capacity of a single memory array. Our approach not only addresses the size limitations imposed by the read margin (RM) of individual arrays but also opens new avenues for integrating such accelerators as back-end solutions in advanced computing platforms.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 81-89 |
| Number of pages | 9 |
| Journal | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
| Volume | 11 |
| DOIs | |
| State | Published - 2025 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Hardware and Architecture
- Electrical and Electronic Engineering
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