TY - GEN
T1 - First Demonstration of Highly Scaled RF GaN-on-Si Dielets Embedded in Glass Interposer
AU - Yadav, Pradyot
AU - Li, Xingchen
AU - Niroula, John
AU - Darmawi-Iskandar, Patrick
AU - Rohde, Ulrich L.
AU - Palacios, Tomas
AU - Swaminathan, Madhavan
N1 - Publisher Copyright:
© 2025 IEEE.
PY - 2025
Y1 - 2025
N2 - This paper presents the first demonstration of a Gallium Nitride (GaN) -on-Si high-electron mobility transistor (HEMT) fully embedded in a glass package. AlGaN/GaN-on-Si HEMTs featuring n++ regrown contacts and a scaled L;=90 nm copper t -gate are fabricated and thinned to 300 μm}. The fabricated HEMTs are singulated to a size of 350 μm × 540 μm via femtosecond laser dicing. Using a 300 μm AGC Inc. glass panel, the dielet is embedded and encapsulated with Ajinomoto Build-Up Film (ABF) GL102. For final back-end-of-line (BEOL) fabrication, two metal and two dielectric redistribution layers (RDL) are fabricated above the dielet. The effects of the RDL are analyzed and quantified through small-signal RF measurements of the integrated dielet. This integration scheme shows co-optimization from transistor to package-level design. This work lays the ground work for the future advanced packaging of such highly scaled GaN-on-Si dielets in a novel device-in-package platform for RF front ends.
AB - This paper presents the first demonstration of a Gallium Nitride (GaN) -on-Si high-electron mobility transistor (HEMT) fully embedded in a glass package. AlGaN/GaN-on-Si HEMTs featuring n++ regrown contacts and a scaled L;=90 nm copper t -gate are fabricated and thinned to 300 μm}. The fabricated HEMTs are singulated to a size of 350 μm × 540 μm via femtosecond laser dicing. Using a 300 μm AGC Inc. glass panel, the dielet is embedded and encapsulated with Ajinomoto Build-Up Film (ABF) GL102. For final back-end-of-line (BEOL) fabrication, two metal and two dielectric redistribution layers (RDL) are fabricated above the dielet. The effects of the RDL are analyzed and quantified through small-signal RF measurements of the integrated dielet. This integration scheme shows co-optimization from transistor to package-level design. This work lays the ground work for the future advanced packaging of such highly scaled GaN-on-Si dielets in a novel device-in-package platform for RF front ends.
UR - https://www.scopus.com/pages/publications/105014241337
UR - https://www.scopus.com/pages/publications/105014241337#tab=citedBy
U2 - 10.1109/IMS40360.2025.11104028
DO - 10.1109/IMS40360.2025.11104028
M3 - Conference contribution
AN - SCOPUS:105014241337
T3 - IEEE MTT-S International Microwave Symposium Digest
SP - 769
EP - 772
BT - 2025 IEEE/MTT-S International Microwave Symposium, IMS 2025
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2025 IEEE/MTT-S International Microwave Symposium, IMS 2025
Y2 - 15 June 2025 through 20 June 2025
ER -