FLAW: FPGA lifetime awareness

Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, N. Vijaykrishnan, Karthik Sarpatwari

Research output: Chapter in Book/Report/Conference proceedingConference contribution

39 Scopus citations

Abstract

Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vulnerable to permanent damage and failures due to different physical phenomenon. Such concerns have been recently demonstrated for regular micro-architectures. In this work we demonstrate the vulnerability of Field Programmable Gate Arrays (FPGA)s to two different types of hard errors, namely, Time Dependent Dielectric Breakdown (TDDB) and Electro-migration. We also analyze the performance degradation of FPGAs over time caused by Hot Carrier Effects (HCE). We also propose three novel techniques to counter such aging based failures and increase the lifetime of the device.

Original languageEnglish (US)
Title of host publication2006 43rd ACM/IEEE Design Automation Conference, DAC'06
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages630-635
Number of pages6
ISBN (Print)1595933816, 1595933816, 9781595933812
DOIs
StatePublished - 2006
Event43rd Annual Design Automation Conference, DAC 2006 - San Francisco, CA, United States
Duration: Jul 24 2006Jul 28 2006

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference43rd Annual Design Automation Conference, DAC 2006
Country/TerritoryUnited States
CitySan Francisco, CA
Period7/24/067/28/06

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering

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