TY - GEN
T1 - FLOSS
T2 - 55th Annual Design Automation Conference, DAC 2018
AU - Zhang, Haibo
AU - Rengasamy, Prasanna Venkatesh
AU - Nachiappan, Nachiappan Chidambaram
AU - Zhao, Shulin
AU - Sivasubramaniam, Anand
AU - Kandemir, Mahmut T.
AU - Das, Chita R.
N1 - Funding Information:
This research is supported in part by NSF grants #1213052, #1302557, #1317560, #1320478, #1409095, #1439021, #1439057, #1626251, #1629129, #1629915, #1714389, #1526750, DARPA/SRC JUMP grant, and Intel.
Publisher Copyright:
© 2018 Association for Computing Machinery.
PY - 2018/6/24
Y1 - 2018/6/24
N2 - Today's mobile platforms have grown in sophistication to run a wide variety of frame-based applications. To deliver better QoS and energy efficiency, these applications utilize multi-flow execution, which exploits hardware-level parallelism across participating accelerators in the SoC. Our study shows that multi-flow execution increases memory pressure, and motivates us to propose a rate-based memoryscheduling scheme, called FLOSS, that considers a flow, individual frames of a flow, and any sharing of IPs across concurrent flows to schedule memory requests. Experimental results indicate that FLOSS provides 12% QoS improvement over baseline FR-FCFS scheme, and outperforms two QoS-aware schemes in multi-flow execution scenarios.
AB - Today's mobile platforms have grown in sophistication to run a wide variety of frame-based applications. To deliver better QoS and energy efficiency, these applications utilize multi-flow execution, which exploits hardware-level parallelism across participating accelerators in the SoC. Our study shows that multi-flow execution increases memory pressure, and motivates us to propose a rate-based memoryscheduling scheme, called FLOSS, that considers a flow, individual frames of a flow, and any sharing of IPs across concurrent flows to schedule memory requests. Experimental results indicate that FLOSS provides 12% QoS improvement over baseline FR-FCFS scheme, and outperforms two QoS-aware schemes in multi-flow execution scenarios.
UR - http://www.scopus.com/inward/record.url?scp=85049585856&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85049585856&partnerID=8YFLogxK
U2 - 10.1145/3195970.3196052
DO - 10.1145/3195970.3196052
M3 - Conference contribution
AN - SCOPUS:85049585856
SN - 9781450357005
T3 - Proceedings - Design Automation Conference
BT - Proceedings of the 55th Annual Design Automation Conference, DAC 2018
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 24 June 2018 through 29 June 2018
ER -