FPGA-based synthesis of FSMs through decomposition

W. L. Yang; R. M. Owens; Mary Jane Irwin

FPGA-based synthesis of FSMs through decomposition

W. L. Yang, R. M. Owens, Mary Jane Irwin

Research output: Contribution to journal › Conference article › peer-review

Abstract

In this paper, we present a heuristic to synthesize a finite state machine as a set of smaller interacting submachines based on FPGA technology. This heuristic partitions inputs as well as outputs. Experimental results show that the sizes of submachines are much smaller than the size of original machine. As a result, the distributed smaller submachines can be operated faster than the original machine because of shorter critical paths.

Original language	English (US)
Pages (from-to)	97-100
Number of pages	4
Journal	Proceedings of the IEEE Great Lakes Symposium on VLSI
State	Published - Dec 1 1994
Event	Proceedings of the 4th Great Lakes Symposium on VLSI - Notre Dame, IN, USA Duration: Mar 4 1994 → Mar 5 1994

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Cite this

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title = "FPGA-based synthesis of FSMs through decomposition",

abstract = "In this paper, we present a heuristic to synthesize a finite state machine as a set of smaller interacting submachines based on FPGA technology. This heuristic partitions inputs as well as outputs. Experimental results show that the sizes of submachines are much smaller than the size of original machine. As a result, the distributed smaller submachines can be operated faster than the original machine because of shorter critical paths.",

author = "Yang, {W. L.} and Owens, {R. M.} and Irwin, {Mary Jane}",

year = "1994",

month = dec,

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language = "English (US)",

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journal = "Proceedings of the IEEE Great Lakes Symposium on VLSI",

issn = "1066-1395",

publisher = "IEEE Computer Society",

note = "Proceedings of the 4th Great Lakes Symposium on VLSI ; Conference date: 04-03-1994 Through 05-03-1994",

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AU - Yang, W. L.

AU - Owens, R. M.

AU - Irwin, Mary Jane

PY - 1994/12/1

Y1 - 1994/12/1

N2 - In this paper, we present a heuristic to synthesize a finite state machine as a set of smaller interacting submachines based on FPGA technology. This heuristic partitions inputs as well as outputs. Experimental results show that the sizes of submachines are much smaller than the size of original machine. As a result, the distributed smaller submachines can be operated faster than the original machine because of shorter critical paths.

AB - In this paper, we present a heuristic to synthesize a finite state machine as a set of smaller interacting submachines based on FPGA technology. This heuristic partitions inputs as well as outputs. Experimental results show that the sizes of submachines are much smaller than the size of original machine. As a result, the distributed smaller submachines can be operated faster than the original machine because of shorter critical paths.

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M3 - Conference article

AN - SCOPUS:0028747241

SN - 1066-1395

SP - 97

EP - 100

JO - Proceedings of the IEEE Great Lakes Symposium on VLSI

JF - Proceedings of the IEEE Great Lakes Symposium on VLSI

T2 - Proceedings of the 4th Great Lakes Symposium on VLSI

Y2 - 4 March 1994 through 5 March 1994

ER -

FPGA-based synthesis of FSMs through decomposition

Abstract

All Science Journal Classification (ASJC) codes

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