GaN Super-Heterojunction FETs With 10-kV Blocking and 3-kV Dynamic Switching

This article reports on two generations of GaN-on-sapphire super-heterojunction (SHJ) transistors, aiming at the realization of 10-kV class power transistors with low static and dynamic ON-resistance. First generation (Gen. 1) GaN SHJ-FETs used a single 2-D electron gas (2DEG) channel design with Schottky gate. Experimental results indicated the feasibility of achieving 10-kV blocking, however, room for improvement to reduce static source-to-drain ON-resistance {R}_{text {DS},text {ON}} and dynamic {R}_{text {DS},text {ON}} degradation. A second generation (Gen. 2) SHJ-MOSFET was designed using an epitaxy with two 2DEG channels for larger ON-state drain current and smaller {R}_{text {DS},text {ON}}. The high-voltage capability and dynamic {R}_{text {DS},text {ON}} degradation mitigation were reached by implementing the GaN SHJ design, while simultaneously avoiding surface trapping between the gate and the SHJ structure. Gen. 2 experimentally showed scaling of blocking voltage with SHJ length up to 10 kV, reduced static {R}_{text {DS},text {ON}} of 71.4~Omega cdot & mm (73.5 text{m}Omega cdot & cm ^{{2}}{)} , low {R}_{text {DS,ON}}{C}_{mathrm {O(}mathrm {tr})} of 4.9 ps, and controlled current collapse of 123% when switched from an OFF-state bias of 3 kV.