TY - GEN
T1 - Glass-Based IC-Embedded Antenna-Integrated Packages for 28-GHz High-Speed Data Communications
AU - Watanabe, Atom O.
AU - Ali, Muhammad
AU - Zhang, Rui
AU - Ravichandran, Siddharth
AU - Kakutani, Takenori
AU - Raj, P. Markondeya
AU - Tummala, Rao R.
AU - Swaminathan, Madhavan
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/6
Y1 - 2020/6
N2 - Chip-embedded mm-wave antenna-integrated modules are demonstrated, for the first time, on panel-scale ultra-thin glass substrates, for high-speed 5G communication standards in the n257 band (26.5 - 29.5 GHz) defined by 3GPP. Co-packaging of amplifiers, filters, and antennas with minimal package parasitics is the key to realize mm-wave package systems. Parasitics arise from on-package and chip-to-package interconnects. This paper focuses on reduced chip-to-package losses and implementation of filters and antennas with chip-embedding structures in glass substrates. To demonstrate the benefits of glass-panel embedding (GPE) for 5G communications, the interconnect losses are benchmarked with the C4-bump based flip-chip technique. The electrical performance shows that the chip-embedding structure with a glass substrate lead to 3X lower insertion loss from chip to antenna than the flip-chip assembly method with C4 bumps. This reduced chip-to-antenna insertion loss brings about the enhanced efficiency and gain of the patch antennas integrated on top of the glass substrates. The process development and electrical performance are benchmarked with emerging 5G substrate technologies such as fan-out wafer level packaging.
AB - Chip-embedded mm-wave antenna-integrated modules are demonstrated, for the first time, on panel-scale ultra-thin glass substrates, for high-speed 5G communication standards in the n257 band (26.5 - 29.5 GHz) defined by 3GPP. Co-packaging of amplifiers, filters, and antennas with minimal package parasitics is the key to realize mm-wave package systems. Parasitics arise from on-package and chip-to-package interconnects. This paper focuses on reduced chip-to-package losses and implementation of filters and antennas with chip-embedding structures in glass substrates. To demonstrate the benefits of glass-panel embedding (GPE) for 5G communications, the interconnect losses are benchmarked with the C4-bump based flip-chip technique. The electrical performance shows that the chip-embedding structure with a glass substrate lead to 3X lower insertion loss from chip to antenna than the flip-chip assembly method with C4 bumps. This reduced chip-to-antenna insertion loss brings about the enhanced efficiency and gain of the patch antennas integrated on top of the glass substrates. The process development and electrical performance are benchmarked with emerging 5G substrate technologies such as fan-out wafer level packaging.
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U2 - 10.1109/ECTC32862.2020.00027
DO - 10.1109/ECTC32862.2020.00027
M3 - Conference contribution
AN - SCOPUS:85090273128
T3 - Proceedings - Electronic Components and Technology Conference
SP - 89
EP - 94
BT - Proceedings - IEEE 70th Electronic Components and Technology Conference, ECTC 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 70th IEEE Electronic Components and Technology Conference, ECTC 2020
Y2 - 3 June 2020 through 30 June 2020
ER -