Guest Editorial Special Section on Security Challenges and Solutions with Emerging Computing Technologies

TY - JOUR

T1 - Guest Editorial Special Section on Security Challenges and Solutions with Emerging Computing Technologies

AU - Chattopadhyay, Anupam

AU - Ghosh, Swaroop

AU - Burleson, Wayne

AU - Mukhopadhyay, Debdeep

N1 - Funding Information: Debdeep Mukhopadhyay (M’13–SM’17) received the B.Tech., M.S., and Ph.D. degrees from IIT Kharagpur, Kharagpur, India. He was an Associate Professor with IIT Kharagpur; a Visiting Scientist with Nanyang Technological University, Singapore; a Visiting Associate Professor with New York University Shanghai, Shanghai, China; an Assistant Professor with IIT Madras, Chennai, India; and a Visiting Researcher with the New York University Tandon School of Engineering, New York, NY, USA. He is currently a Full Professor with the Department of Computer Science and Engineering, IIT Kharagpur, where he initiated the Secured Embedded Architecture Laboratory (SEAL), with a focus on embedded security and side-channel attacks. He has recently incubated a start-up on hardware security, ESP Pvt., Ltd., IIT Kharagpur. His books include Fault Tolerant Architectures for Cryptography and Hardware Security (Springer), Cryptography and Network Security (McGraw Hills), Hardware Security: Design, Threats, and Safeguards (CRC Press), and Timing Channels in Cryptography (Springer). He has authored more than 150 articles in peer-reviewed conferences and journals and has collaborated with several Indian and foreign organizations. His current research interests include cryptography, hardware security, and VLSI. Dr. Mukhopadhyay was a recipient of the prestigious Swarnajayanti DST Fellowship from 2015 to 2016, the Young Scientist Award from the Indian National Science Academy, and the Young Engineer Award from the Indian National Academy of Engineers. He is the Young Associate of the Indian Academy of Science. He was also awarded the Outstanding Young Faculty Fellowship by IIT Kharagpur in 2011 and the Techno-Inventor Best PhD Award by the Indian Semiconductor Association. He has been on the program committees of several top international conferences. He is also an Associate Editor of the International Association of Cryptologic Research (IACR) Transactions of Cryptographic Hardware and Embedded Systems (CHES), Journal of Hardware and Systems Security, Journal of Cryptographic Engineering (Springer), and the IEEE TRANSACTIONS ON INFORMATION FORENSICS AND SECURITY (IEEE TIFS). He has given several invited talks in industry and academia, including tutorial talks at premier conferences, such as CHES, Workshop on Information Forensics and Security (WIFS), and Very Large Scale Integration Design Conference (VLSID). Funding Information: Swaroop Ghosh (M’08–SM’13) received the B.E. degree (Hons.) from IIT Roorkee, Roorkee, India, the M.S. degree from the University of Cincinnati, Cincinnati, OH, USA, and the Ph.D. degree from Purdue University, West Lafayette, IN, USA. He was a Senior Research and Development Engineer with Advanced Design, Intel Corp., Hillsboro, OR, USA, where his research was focused on low power and robust embedded memory design in scaled technologies. He was with the Faculty of the University of South Florida, Tampa, FL, USA. He is currently an Assistant Professor with the School of Electrical Engineering and Computer Science, Penn State University, State College, PA, USA. His current research interests include low-power circuits, hardware security, quantum computing, and digital testing for nanometer technologies. Dr. Ghosh is a Senior Member of the National Academy of Inventors (NAI) and an Associate Member of Sigma Xi. He was a recipient of the Intel Technology and Manufacturing Group Excellence Award in 2009, the Intel Divisional Award in 2011, the Intel Departmental Awards in 2011 and 2012, the USF Outstanding Research Achievement Award in 2015, the College of Engineering Outstanding Research Achievement Award in 2015, the DARPA Young Faculty Award (YFA) in 2015, the ACM SIGDA Outstanding New Faculty Award in 2016, the YFA Director’s Fellowship in 2017, the Monkowsky Career Development Award in 2018, the Lutron Spira Teaching Excellence Award in 2018, and the Dean’s Certificate of Excellence in 2019. He has served on the Technical Program Committees of ACM/IEEE conferences, such as Design Automation Conference (DAC), International Conference on Computer Aided Design (ICCAD), Custom Integrated Circuits Conference (CICC), Design Automation and Test in Europe (DATE), International Symposium on Low Power Electronic Design (ISLPED), Great Lakes Symposium on Very Large Scale Integration (GLSVLSI), Nanoarch, and International Symposium on Quality Electronic Design (ISQED). He has served as the Program Chair of the DAC Ph.D. Forum in 2016 and ISQED in 2019 and the Track (Co)-Chair of ISQED from 2016 to 2017, ISLPED from 2017 to 2018, and CICC from 2017 to 2019. He has served as an Associate Editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART I: REGULAR PAPERS from 2014 to 2015 and as a Senior Editorial Board Member for the IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS (JETCAS) from 2016 to 2018. He has served as the Guest Editor for the IEEE JETCAS from 2015 to 2016 and the IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS from 2018 to 2019. He has been serving as an Associate Editor for the IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS since 2019. He is also a Distinguished Speaker of the ACM.

PY - 2019/11

Y1 - 2019/11

UR - https://www.scopus.com/pages/publications/85077606365

UR - https://www.scopus.com/pages/publications/85077606365#tab=citedBy

U2 - 10.1109/TVLSI.2019.2945850

DO - 10.1109/TVLSI.2019.2945850

M3 - Editorial

AN - SCOPUS:85077606365

SN - 1063-8210

VL - 27

SP - 2469

EP - 2472

JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IS - 11

M1 - 8880712

ER -