Hardware implementation of Bayesian network based on two-dimensional memtransistors

Keyphrases

• Two Dimensional 100%
• Network Applications 100%
• Bayesian Network 100%
• Hardware Implementation 100%
• Stochasticity 33%
• Integrated Circuits 16%
• Low Power 16%
• Energy Efficiency 16%
• Computer Vision 16%
• Monolithically Integrated 16%
• Cycle-to-cycle 16%
• Complementary Metal-oxide-semiconductor Technology 16%
• Platform-Based 16%
• Spintronic Devices 16%
• Area-efficient 16%
• Two-terminal 16%
• Logic Gates 16%
• Silicon-based 16%
• Cyclical Fluctuations 16%
• Computing Applications 16%
• Network Implementation 16%
• Complementary Metal Oxide Semiconductor 16%
• Matrix-vector multiplication 16%
• Hardware Platform 16%
• Bitstream 16%
• Conductance States 16%
• Probabilistic Problems 16%

Engineering

• Two Dimensional 100%
• Complementary Metal-Oxide-Semiconductor 100%
• Energy Conservation 50%
• Matrix Multiplication 50%
• Energy Efficiency 50%
• Computervision 50%
• Magnetoelectronics 50%
• Logic Gate 50%
• Bitstream 50%

Computer Science

• Hardware Implementation 100%
• Bayesian Networks 100%
• Complementary Metal Oxide Semiconductor 33%
• Matrix Multiplication 16%
• Energy Efficiency 16%
• Logic Gate 16%
• Hardware Platform 16%
• Memristor 16%
• Probabilistic Problem 16%
• Widespread Application 16%