Abstract
Failure resistant hardware designs are presented, for both IIR and FIR digital filters. It is found that the complexity of the error detection/correction hardware is less for FIR filters, in which scaling is not required and there is more freedom in the selection of moduli. It is shown how the special structure of the mixed radix conversion algorithm can be used to advantage for reducing hardware complexity for possible VLSI fabrication.
Original language | English (US) |
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Pages (from-to) | 88-91 |
Number of pages | 4 |
Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
Volume | 1 |
State | Published - Jan 1 1981 |
Event | Unknown conference - Chicago, IL, USA Duration: Apr 27 1981 → Apr 29 1981 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering