TY - GEN
T1 - Hardware-software co-adaptation for data-intensive embedded applications
AU - Kadayif, I.
AU - Kandemir, M.
AU - Vijaykrishnan, N.
AU - Irwin, M. J.
N1 - Publisher Copyright:
© 2002 IEEE.
PY - 2002
Y1 - 2002
N2 - By studying energy and performance behavior of six array-dominated benchmarks, we observed that each nest in these applications works best with a specific cache configuration and optimization strategy. We also observed that cache configurations and optimization strategies required by different nests are, in general, different from each other. Based on this observation, in this paper, we propose a search space-based optimization for reducing energy consumption and improving performance. Specifically, we study potential benefits of a hardware-software co-adaptation scheme where cache configuration and optimization strategy are modified in the course of execution. Note that this is one step beyond determining just a suitable combination of (optimized) code/cache configuration which is valid throughout the execution of the application. The idea in co-adaptation is to ensure that each nested loop works with a cache configuration most suitable for it from the perspective of a given objective criterion. It should be noted, however, that dynamic cache reconfiguration does not come for free; it has both energy and performance costs which also need to be accounted for.
AB - By studying energy and performance behavior of six array-dominated benchmarks, we observed that each nest in these applications works best with a specific cache configuration and optimization strategy. We also observed that cache configurations and optimization strategies required by different nests are, in general, different from each other. Based on this observation, in this paper, we propose a search space-based optimization for reducing energy consumption and improving performance. Specifically, we study potential benefits of a hardware-software co-adaptation scheme where cache configuration and optimization strategy are modified in the course of execution. Note that this is one step beyond determining just a suitable combination of (optimized) code/cache configuration which is valid throughout the execution of the application. The idea in co-adaptation is to ensure that each nested loop works with a cache configuration most suitable for it from the perspective of a given objective criterion. It should be noted, however, that dynamic cache reconfiguration does not come for free; it has both energy and performance costs which also need to be accounted for.
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U2 - 10.1109/ISVLSI.2002.1016868
DO - 10.1109/ISVLSI.2002.1016868
M3 - Conference contribution
AN - SCOPUS:84948659471
T3 - Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
SP - 20
EP - 25
BT - Proceedings - IEEE Computer Society Annual Symposium on VLSI
A2 - Smailagic, Asim
A2 - Brodersen, Robert
PB - IEEE Computer Society
T2 - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2002
Y2 - 25 April 2002 through 26 April 2002
ER -