Hardware-software co-design to mitigate DRAM refresh overheads: A case for refresh-aware process scheduling

Computer Science

• Participatory Design 100%
• Scheduling Process 100%
• Performance Bottleneck 66%
• Operating Environment 66%
• Data Integrity 33%
• Performance Improvement 33%
• Mobile Environment 33%
• Scheduling Algorithm 33%
• Hardware Address 33%
• Operating System 33%
• Virtualized Environment 33%

Keyphrases

• Hardware-software Co-design 100%
• DRAM Refresh 100%
• Process Scheduling 100%
• Performance Bottleneck 33%
• Retention Time 16%
• Data Integrity 16%
• Performance Improvement 16%
• High Capacity 16%
• Mobile Environment 16%
• Virtual Environment 16%
• Operating System 16%
• Scheduling Algorithm 16%
• Address Mapping 16%
• Number of Rows 16%
• DRAM Cell 16%

Engineering

• Operating Environment 100%
• Millisecond 50%
• Retention Time 50%
• Performance Improvement 50%
• Moving System 50%