TY - GEN
T1 - High-performance low-energy STT MRAM based on balanced write scheme
AU - Lee, Dongsoo
AU - Gupta, Sumeet Kumar
AU - Roy, Kaushik
N1 - Copyright:
Copyright 2012 Elsevier B.V., All rights reserved.
PY - 2012
Y1 - 2012
N2 - It is well known that high write time/energy in STT MRAM are aggravated by the asymmetry in write currents for '0'→'1' and '1'→'0' transitions. This asymmetry is primarily due to the source degeneration of the access transistor during write. In this work, we propose a design methodology which avoids the source degeneration of the access transistor, leading to balanced switching times for '0'→'1' and '1'→'0' transitions. This is achieved by using an additional (negative) bit-line voltage and reduced word-line voltage. The proposed method reduces write time (by ∼40%) and write energy (by 65%), enhances reliability of MTJ, and significantly improves tolerance to process variation. In the proposed scheme, source-line can be directly connected to ground signal leading to a compact cell layout.
AB - It is well known that high write time/energy in STT MRAM are aggravated by the asymmetry in write currents for '0'→'1' and '1'→'0' transitions. This asymmetry is primarily due to the source degeneration of the access transistor during write. In this work, we propose a design methodology which avoids the source degeneration of the access transistor, leading to balanced switching times for '0'→'1' and '1'→'0' transitions. This is achieved by using an additional (negative) bit-line voltage and reduced word-line voltage. The proposed method reduces write time (by ∼40%) and write energy (by 65%), enhances reliability of MTJ, and significantly improves tolerance to process variation. In the proposed scheme, source-line can be directly connected to ground signal leading to a compact cell layout.
UR - https://www.scopus.com/pages/publications/84865540585
UR - https://www.scopus.com/pages/publications/84865540585#tab=citedBy
U2 - 10.1145/2333660.2333665
DO - 10.1145/2333660.2333665
M3 - Conference contribution
AN - SCOPUS:84865540585
SN - 9781450312493
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
SP - 9
EP - 14
BT - ISLPED'12 - Proceedings of the International Symposium on Low Power Electronics and Design
T2 - 2012 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'12
Y2 - 30 July 2012 through 1 August 2012
ER -