Abstract
As silicon reaches its scaling limits, two-dimensional materials are a promising route for further transistor miniaturization. Advances in contact engineering, channel length (LCH) scaling and high-κ dielectric integration have led to impressive two-dimensional transistor performance, but challenges remain, including high off-state leakage currents due to negative threshold voltage values and high contact resistances as contact length (LC) is reduced. A monolayer-centric approach has also limited the exploration of the advantages that few-layer (two to three) materials may offer. Here we show that industry-compatible metal–organic chemical vapour deposition can be used to grow wafer-scale molybdenum disulfide (MoS2) and fabricate transistors with LCH and LC scaled to 35 nm and 30 nm, respectively. We integrate a high-κ gate dielectric with an equivalent oxide thickness of less than 2.5 nm and create monolayer, bilayer and trilayer MoS2 transistors. The scaled trilayer transistors exhibit an on-state current of 220 µA µm−1, a positive threshold voltage and off-state current below 10 pA µm−1 at zero gate bias. Trilayer MoS2 transistors show enhanced performance compared with monolayer devices at scaled LC due to a shorter transfer length and lower Schottky barrier height. To illustrate the reliability and reproducibility of the approach, we provide statistics for approximately 1,000 scaled devices.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 1201-1210 |
| Number of pages | 10 |
| Journal | Nature Electronics |
| Volume | 8 |
| Issue number | 12 |
| DOIs | |
| State | Published - Dec 2025 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Instrumentation
- Electrical and Electronic Engineering