Abstract
In this paper we examine the usefulness of a simple memory array architecture to several image processing tasks. This architecture, called the Access Constrained Memory Array Architecture (ACMAA) has a linear array of processors which concurrently access distinct rows or columns of an array of memory modules. We have developed several parallel image processing algorithms for this architecture. All the algorithms presented in this paper achieve a linear speed-up over the corresponding fast sequential algorithms. This was made possible by exploiting the efficient local as well as global communication capabilities of the ACMAA.
Original language | English (US) |
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Pages (from-to) | 313-324 |
Number of pages | 12 |
Journal | Journal of VLSI Signal Processing |
Volume | 2 |
Issue number | 4 |
DOIs | |
State | Published - May 1991 |
All Science Journal Classification (ASJC) codes
- Signal Processing
- Information Systems
- Electrical and Electronic Engineering