Impact of single trap random telegraph noise on heterojunction TFET SRAM stability

We investigate the effect of a single charge trap random telegraph noise (RTN)-induced degradation in III-V heterojunction tunnel FET (HTFET)-based SRAM. Our analysis focuses on Schmitt trigger (ST) mechanism-based variation tolerant ten-transistor SRAM. We compare iso-area SRAM cell configurations in Si-FinFET and HTFET. Our results show that HTFET ST SRAMs provide significant energy/performance enhancements even in the presence of RTN. For sub-0.2 V operation (Vcc), HTFET ST SRAM offers 15% improvement in read-write noise margins along with better variation immunity from RTN over Si-FinFET ST SRAM. A comparison with iso-area 6T Si-FinFET SRAM with wider size transistors shows 43% improved read noise margin in 10T HTFET ST SRAM at Vcc=0.175~V. In addition, HTFET ST SRAM exhibits 48X lower read access delay and 1.5X reduced power consumption over Si-FinFET ST SRAM operating at their respective Vcc-min.